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pluto_hdl_adi/library/axi_dmac
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Lars-Peter Clausen de0edc2083 axi_dmac: src_fifo_inf: Clear pipeline when no transfers are active 
Clear the pipeline when no transfers are active to make sure that we do not
get residual data on the first sample for the next transfer.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 		2014-09-16 21:02:05 +02:00
..
2d_transfer.v axi_dmac: Fix issues with non 64-bit AXI masters 2014-04-10 14:54:22 +02:00
address_generator.v axi_dmac: Added fix to work with motor_control 2014-09-03 12:10:34 +03:00
axi_dmac.v axi_dmac: Remove Altera toplevel wrapper 2014-09-11 12:28:14 +02:00
axi_dmac_constr.xdc library: local constraints async groups 2014-08-14 15:09:51 -04:00
axi_dmac_hw.tcl axi_dmac/axi_fifo: Add missing file 2014-09-15 21:04:57 +02:00
axi_dmac_ip.tcl axi_dmac/axi_fifo: Add missing file 2014-09-15 21:04:57 +02:00
axi_register_slice.v axi_dmac: axi_register_slice: Provide default values for registers 2014-04-10 13:50:39 +02:00
axi_repack.v axi_dmac: Add support for DMA bus widths other than 64 bit 2014-03-13 13:20:10 +01:00
data_mover.v axi_damc: Add xfer_req to the FIFO source interface 2014-07-02 16:05:16 +02:00
dest_axi_mm.v axi_dmac: Fix issues with non 64-bit AXI masters 2014-04-10 14:54:22 +02:00
dest_axi_stream.v axi_dmac: Fix Vivado warnings 2014-03-18 20:59:13 +01:00
dest_fifo_inf.v axi_dmac: Fix Vivado warnings 2014-03-18 20:59:13 +01:00
inc_id.h Added axi_dmac, axi_fifo and misc files in library 2014-03-06 18:16:02 +02:00
request_arb.v axi_damc: Add xfer_req to the FIFO source interface 2014-07-02 16:05:16 +02:00
request_generator.v axi_dmac: Add support for DMA bus widths other than 64 bit 2014-03-13 13:20:10 +01:00
resp.h Added axi_dmac, axi_fifo and misc files in library 2014-03-06 18:16:02 +02:00
response_generator.v axi_dmac: response_generator: Do not generate responses during ID sync 2014-03-18 19:12:13 +01:00
response_handler.v axi_dmac: Fix Vivado warnings 2014-03-18 20:59:13 +01:00
splitter.v Added axi_dmac, axi_fifo and misc files in library 2014-03-06 18:16:02 +02:00
src_axi_mm.v axi_dmac: Fix issues with non 64-bit AXI masters 2014-04-10 14:54:22 +02:00
src_axi_stream.v axi_dmac: Add support for DMA bus widths other than 64 bit 2014-03-13 13:20:10 +01:00
src_fifo_inf.v axi_dmac: src_fifo_inf: Clear pipeline when no transfers are active 2014-09-16 21:02:05 +02:00