Adrian Costina aece3f5555 axi_ad9680: Update IP core ... - added signals so that AD9680 can be connected to altera's xcvr core through an avalon streaming sink - added DEVICE_TYPE parameter in _hw.tcl, set to 1 for altera		2016-08-01 15:05:30 +03:00
..
Makefile	hdlmake- updates	2016-07-21 16:10:38 -04:00
axi_ad9680.v	axi_ad9680: Update IP core	2016-08-01 15:05:30 +03:00
axi_ad9680_channel.v	axi_ad9680: Q_OR_I_N is not used in this channel	2016-01-13 16:26:22 +02:00
axi_ad9680_constr.xdc	library: make preset registered for timing paths	2015-06-10 13:41:41 -04:00
axi_ad9680_hw.tcl	axi_ad9680: Update IP core	2016-08-01 15:05:30 +03:00
axi_ad9680_if.v	ad9680- sof + sample delineation	2016-07-21 16:09:33 -04:00
axi_ad9680_ip.tcl	ad9680- sof + sample delineation	2016-07-21 16:09:33 -04:00
axi_ad9680_pnmon.v	Add .gitattributes file	2015-06-26 11:07:10 +02:00