c9d28cdb42
The introduction of sysid IPs on some Stratix 10 projects introduced a problem where they would fail to build, due to mem_init_sys_file_path not being defined. This is fixed now. Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> |
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a10soc | ||
common | ||
s10soc | ||
zc706 | ||
zcu102 | ||
Makefile | ||
Readme.md |
Readme.md
ADRV9009 HDL Project
Here are some pointers to help you:
- Board Product Page
- Parts : Integrated Dual RF Tx, Rx, and Observation Rx 8 channels, I2C, 12-bit SAR ADC with built-in temperature sensor
- Project Doc: https://wiki.analog.com/resources/eval/user-guides/adrv9009/quickstart
- HDL Doc: https://wiki.analog.com/resources/eval/user-guides/adrv9009/reference_hdl
- Linux Drivers: https://wiki.analog.com/resources/tools-software/linux-drivers/iio-transceiver/adrv9009