pluto_hdl_adi/projects/common/zc706
laurent-19 1eb5f4985b projects/common: Add build files templates carriers. Modified Quartus Versions
The build files are available for the following carriers:
* intel: a10gx, a10soc, c5soc, de10nano, s10soc
* xilinx: coraz7s, kc705, kcu105, vc707, vc709,
	  vck190, vcu118, vcu128, vmk180,
	  zc702, zc706, zcu102, zed

* Added Makefiles, system_constr.sdc, system_qsys intel
* Added Makefiles, system_bd, system_constr xilinx
* de10nano, c5soc: Changed quartus version from 20.1.1 to 21.1.0
  according to last commit update

Signed-off-by: laurent-19 <laurentiu.popa@analog.com>
2022-10-05 10:47:21 +03:00
..
Makefile projects/common: Add build files templates carriers. Modified Quartus Versions 2022-10-05 10:47:21 +03:00
system_bd.tcl projects/common: Add build files templates carriers. Modified Quartus Versions 2022-10-05 10:47:21 +03:00
system_project.tcl projects/common: Add system_top _project templates 2022-09-20 17:00:49 +03:00
system_top.v projects/common: Add system_top _project templates 2022-09-20 17:00:49 +03:00
zc706_fmc_hpc.txt projects/common: Add fmc connection files for every platform 2022-09-20 14:11:08 +03:00
zc706_fmc_lpc.txt projects/common: Add fmc connection files for every platform 2022-09-20 14:11:08 +03:00
zc706_plddr3_adcfifo_bd.tcl zc706/plddr3_adc|dacfifo_bd: PL DDR3 size is 1Gbyte 2019-05-06 17:17:00 +03:00
zc706_plddr3_constr.xdc plddr3- change to board files 2017-02-22 15:22:50 -05:00
zc706_plddr3_dacfifo_bd.tcl zc706/plddr3_adc|dacfifo_bd: PL DDR3 size is 1Gbyte 2019-05-06 17:17:00 +03:00
zc706_plddr3_mig.prj plddr3- change to board files 2017-02-22 15:22:50 -05:00
zc706_system_bd.tcl axi_hdmi_tx update for: ZedBoard, ZC706, ZC702, de10nano, ADRV9361-Z7035 (#897) 2022-03-29 16:51:21 +03:00
zc706_system_constr.xdc zynq:all: fix SPI clock constraint 2019-08-09 16:39:56 +03:00