Lars-Peter Clausen ce8bcfd192 fmcjesdadc1: Remove wire that is a redeclaration of a port ... Fixes the following warning: [Synth 8-2611] redeclaration of ansi port rx_sysref is not allowed This is a leftover of commit 1c23cf4621 ("all: Update verilog files to verilog-2001"). Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>		2018-02-16 13:32:26 +01:00
..
Makefile	fmcjesdac1: Convert to ADI JESD204	2017-05-23 11:16:07 +02:00
system_bd.tcl	fmcjesdadc1: Update IP instantiations	2017-04-21 15:08:16 +03:00
system_constr.xdc	constraints: Update constraints	2017-02-24 13:43:32 +02:00
system_project.tcl	scripts: Change adi_project_create to adi_project_xilinx for creating xilinx projects	2017-06-07 12:06:50 +03:00
system_top.v	fmcjesdadc1: Remove wire that is a redeclaration of a port	2018-02-16 13:32:26 +01:00