78 lines
5.5 KiB
Plaintext
Executable File
78 lines
5.5 KiB
Plaintext
Executable File
###############################################################################
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## Copyright (C) 2018-2023 Analog Devices, Inc. All rights reserved.
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### SPDX short identifier: ADIBSD
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###############################################################################
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# constraints
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# ad9361 (SWAP == 0x1)
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set_property -dict {PACKAGE_PIN N11 IOSTANDARD LVCMOS18 } [get_ports rx_clk_in]
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set_property -dict {PACKAGE_PIN N13 IOSTANDARD LVCMOS18 } [get_ports rx_frame_in]
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set_property -dict {PACKAGE_PIN P15 IOSTANDARD LVCMOS18 } [get_ports rx_data_in[0]]
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set_property -dict {PACKAGE_PIN R15 IOSTANDARD LVCMOS18 } [get_ports rx_data_in[1]]
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set_property -dict {PACKAGE_PIN P14 IOSTANDARD LVCMOS18 } [get_ports rx_data_in[2]]
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set_property -dict {PACKAGE_PIN R13 IOSTANDARD LVCMOS18 } [get_ports rx_data_in[3]]
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set_property -dict {PACKAGE_PIN P13 IOSTANDARD LVCMOS18 } [get_ports rx_data_in[4]]
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set_property -dict {PACKAGE_PIN R12 IOSTANDARD LVCMOS18 } [get_ports rx_data_in[5]]
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set_property -dict {PACKAGE_PIN P11 IOSTANDARD LVCMOS18 } [get_ports rx_data_in[6]]
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set_property -dict {PACKAGE_PIN R11 IOSTANDARD LVCMOS18 } [get_ports rx_data_in[7]]
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set_property -dict {PACKAGE_PIN P10 IOSTANDARD LVCMOS18 } [get_ports rx_data_in[8]]
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set_property -dict {PACKAGE_PIN R10 IOSTANDARD LVCMOS18 } [get_ports rx_data_in[9]]
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set_property -dict {PACKAGE_PIN N9 IOSTANDARD LVCMOS18 } [get_ports rx_data_in[10]]
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set_property -dict {PACKAGE_PIN P9 IOSTANDARD LVCMOS18 } [get_ports rx_data_in[11]]
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set_property -dict {PACKAGE_PIN N12 IOSTANDARD LVCMOS18 OFFCHIP_TERM NONE} [get_ports tx_clk_out]
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set_property -dict {PACKAGE_PIN N14 IOSTANDARD LVCMOS18 OFFCHIP_TERM NONE} [get_ports tx_frame_out]
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set_property -dict {PACKAGE_PIN L14 IOSTANDARD LVCMOS18 OFFCHIP_TERM NONE} [get_ports tx_data_out[0]]
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set_property -dict {PACKAGE_PIN L15 IOSTANDARD LVCMOS18 OFFCHIP_TERM NONE} [get_ports tx_data_out[1]]
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set_property -dict {PACKAGE_PIN L13 IOSTANDARD LVCMOS18 OFFCHIP_TERM NONE} [get_ports tx_data_out[2]]
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set_property -dict {PACKAGE_PIN M15 IOSTANDARD LVCMOS18 OFFCHIP_TERM NONE} [get_ports tx_data_out[3]]
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set_property -dict {PACKAGE_PIN K13 IOSTANDARD LVCMOS18 OFFCHIP_TERM NONE} [get_ports tx_data_out[4]]
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set_property -dict {PACKAGE_PIN M14 IOSTANDARD LVCMOS18 OFFCHIP_TERM NONE} [get_ports tx_data_out[5]]
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set_property -dict {PACKAGE_PIN K12 IOSTANDARD LVCMOS18 OFFCHIP_TERM NONE} [get_ports tx_data_out[6]]
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set_property -dict {PACKAGE_PIN M12 IOSTANDARD LVCMOS18 OFFCHIP_TERM NONE} [get_ports tx_data_out[7]]
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set_property -dict {PACKAGE_PIN K11 IOSTANDARD LVCMOS18 OFFCHIP_TERM NONE} [get_ports tx_data_out[8]]
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set_property -dict {PACKAGE_PIN M11 IOSTANDARD LVCMOS18 OFFCHIP_TERM NONE} [get_ports tx_data_out[9]]
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set_property -dict {PACKAGE_PIN M10 IOSTANDARD LVCMOS18 OFFCHIP_TERM NONE} [get_ports tx_data_out[10]]
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set_property -dict {PACKAGE_PIN M9 IOSTANDARD LVCMOS18 OFFCHIP_TERM NONE} [get_ports tx_data_out[11]]
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set_property -dict {PACKAGE_PIN G14 IOSTANDARD LVCMOS18} [get_ports gpio_status[0]]
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set_property -dict {PACKAGE_PIN G11 IOSTANDARD LVCMOS18} [get_ports gpio_status[1]]
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set_property -dict {PACKAGE_PIN G12 IOSTANDARD LVCMOS18} [get_ports gpio_status[2]]
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set_property -dict {PACKAGE_PIN H14 IOSTANDARD LVCMOS18} [get_ports gpio_status[3]]
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set_property -dict {PACKAGE_PIN H13 IOSTANDARD LVCMOS18} [get_ports gpio_status[4]]
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set_property -dict {PACKAGE_PIN H12 IOSTANDARD LVCMOS18} [get_ports gpio_status[5]]
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set_property -dict {PACKAGE_PIN H11 IOSTANDARD LVCMOS18} [get_ports gpio_status[6]]
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set_property -dict {PACKAGE_PIN J11 IOSTANDARD LVCMOS18} [get_ports gpio_status[7]]
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set_property -dict {PACKAGE_PIN E11 IOSTANDARD LVCMOS18} [get_ports gpio_ctl[0]]
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set_property -dict {PACKAGE_PIN E12 IOSTANDARD LVCMOS18} [get_ports gpio_ctl[1]]
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set_property -dict {PACKAGE_PIN E13 IOSTANDARD LVCMOS18} [get_ports gpio_ctl[2]]
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set_property -dict {PACKAGE_PIN F12 IOSTANDARD LVCMOS18} [get_ports gpio_ctl[3]]
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set_property -dict {PACKAGE_PIN J13 IOSTANDARD LVCMOS18} [get_ports gpio_en_agc]
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set_property -dict {PACKAGE_PIN J14 IOSTANDARD LVCMOS18} [get_ports enable]
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set_property -dict {PACKAGE_PIN N8 IOSTANDARD LVCMOS18} [get_ports txnrx]
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set_property -dict {PACKAGE_PIN J15 IOSTANDARD LVCMOS18 OFFCHIP_TERM NONE} [get_ports iic_scl]
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set_property -dict {PACKAGE_PIN K15 IOSTANDARD LVCMOS18 OFFCHIP_TERM NONE} [get_ports iic_sda]
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set_property -dict {PACKAGE_PIN P8 IOSTANDARD LVCMOS18 OFFCHIP_TERM NONE} [get_ports spi_csn]
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set_property -dict {PACKAGE_PIN R7 IOSTANDARD LVCMOS18 OFFCHIP_TERM NONE} [get_ports spi_clk]
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set_property -dict {PACKAGE_PIN N7 IOSTANDARD LVCMOS18 OFFCHIP_TERM NONE} [get_ports spi_mosi]
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set_property -dict {PACKAGE_PIN R8 IOSTANDARD LVCMOS18 OFFCHIP_TERM NONE} [get_ports spi_miso]
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set_property -dict {PACKAGE_PIN L12 IOSTANDARD LVCMOS18} [get_ports clk_out]
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create_clock -name rx_clk -period 16.27 [get_ports rx_clk_in]
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set_property -dict {PACKAGE_PIN G15 IOSTANDARD LVCMOS18} [get_ports pl_gpio[1]]
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set_property -dict {PACKAGE_PIN F15 IOSTANDARD LVCMOS18} [get_ports pl_gpio[2]]
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set_property -dict {PACKAGE_PIN F14 IOSTANDARD LVCMOS18} [get_ports pl_gpio[3]]
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set_property -dict {PACKAGE_PIN F13 IOSTANDARD LVCMOS18} [get_ports pl_gpio[4]]
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set_false_path -from [get_pins {i_system_wrapper/system_i/axi_ad9361/inst/i_rx/i_up_adc_common/up_adc_gpio_out_int_reg[0]*/C}]
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set_false_path -from [get_pins {i_system_wrapper/system_i/axi_ad9361/inst/i_tx/i_up_dac_common/up_dac_gpio_out_int_reg[0]*/C}]
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