Makefile
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all: Rename altera to intel
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2019-06-29 06:53:51 +03:00 |
axi_ad9371.v
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Add FPGA info parameters flow
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2019-03-30 11:26:11 +02:00 |
axi_ad9371_hw.tcl
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all: Rename altera to intel
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2019-06-29 06:53:51 +03:00 |
axi_ad9371_if.v
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license: Fix a spelling mistake
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2018-04-11 15:09:54 +03:00 |
axi_ad9371_rx.v
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Add FPGA info parameters flow
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2019-03-30 11:26:11 +02:00 |
axi_ad9371_rx_channel.v
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license: Fix a spelling mistake
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2018-04-11 15:09:54 +03:00 |
axi_ad9371_rx_os.v
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Add FPGA info parameters flow
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2019-03-30 11:26:11 +02:00 |