f3102eea5a
The MAX_BYTES_PER_BURST option allows to configure the maximum bytes that are part of a burst. This can be an arbitrary value. At the same time there is a limit of how many bytes can be supported by the memory buses. A AXI3 interface supports a maximum of 16 beats per burst and a AXI4 interface supports a maximum of 256 beats per burst. At the moment the it is possible to specify a MAX_BYTES_PER_BURST value that exceeds what can be supported by the AXI memory-mapped bus. If that is the case undefined behavior will occur and the DMAC will function incorrectly. To avoid this make sure that the MAX_BYTES_PER_BURST value does not exceed the maximum that can be supported by the interfaces. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> |
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bd.tcl |