Laszlo Nagy 5edc798b6b axi_jesd204_common/jesd204_up_common: Add event stats ... Add statistics for : - number of link enable events - number of interrupt events (regardless of mask) 0x0B0 0x2C0 Stats Control Register [0] - Write 1 to clear stat registers 0x0B1 0x2C4 Link Enable Stat Register [15:0] Number of times the link was enabled from power-on or from last stat clear 0x0B4 0x2D0 IRQ Stat Register 0 [31:16] IRQ 1 counter [15:0] IRQ 0 counter 0x0B5 0x2D4 IRQ Stat Register 1 [31:16] IRQ 3 counter [15:0] IRQ 2 counter 0x0B6 0x2D8 IRQ Stat Register 2 [31:16] IRQ 5 counter [15:0] IRQ 4 counter 0x0B7 0x2DC IRQ Stat Register 3 [31:16] IRQ 7 counter [15:0] IRQ 6 counter		2020-09-29 17:27:42 +03:00
..
Makefile	Makefile: Update makefiles	2019-08-26 16:58:01 +03:00
axi_jesd204_rx.v	axi_jesd204_common/jesd204_up_common: Add event stats	2020-09-29 17:27:42 +03:00
axi_jesd204_rx_constr.sdc	jesd204: Add RX error statistics (#98)	2018-05-07 15:33:00 +03:00
axi_jesd204_rx_constr.xdc	jesd204_rx: Generate interrupt on frame alignment error	2020-07-31 11:43:41 +03:00
axi_jesd204_rx_hw.tcl	jesd204_rx: Add RX frame alignment character check	2020-07-31 11:43:41 +03:00
axi_jesd204_rx_ip.tcl	jesd204_rx: Interrupt for unexpected lane status error	2020-07-31 11:43:41 +03:00
axi_jesd204_rx_ooc.ttcl	jesd204:axi_jesd204_rx: set OOC default clock constraints	2019-04-22 10:27:16 +03:00
jesd204_up_ilas_mem.v	cosmetics: Change Altera to Intel in comments	2019-06-29 06:53:51 +03:00
jesd204_up_rx.v	jesd204_rx: Add RX frame alignment character check	2020-07-31 11:43:41 +03:00
jesd204_up_rx_lane.v	jesd204_rx: Add RX frame alignment character check	2020-07-31 11:43:41 +03:00