ATofan ee56db8d50 FMCOMMS2: Modified FCLK2 to 125 MHz, and xdc file ... tcl: FCLK2 was modified from 100 MHz to 125 MHz. xdc: rx_clk period constraint was redefined from 8ns (125 MHz) to 4ns (250 MHz)		2014-03-14 16:27:56 +02:00
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adv7511	Initial check in of VC707 base project	2014-03-10 17:26:17 +02:00
common	Merge branch 'master' of github.com:analogdevicesinc/hdl	2014-03-11 09:58:34 -04:00
fmcomms1	FMCOMMS1: Updated projects and axi_ad9643 core	2014-03-12 16:23:41 +02:00
fmcomms2	FMCOMMS2: Modified FCLK2 to 125 MHz, and xdc file	2014-03-14 16:27:56 +02:00
scripts	Fix default repository path for adi_project.tcl	2014-03-13 10:28:16 +02:00