Dan Hotoleanu e8ff32d6df ad6676evb: Parameterize JESD204 configuration values ... Added the capability to set the JESD204 configuration values from a single point in the code and to modify these default settings from the command line for the Xilinx FPGAs in the project. Signed-off-by: Dan Hotoleanu <dan.hotoleanu@analog.com>		2022-01-31 10:36:31 +02:00
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ad6676evb_bd.tcl	ad6676evb: Parameterize JESD204 configuration values	2022-01-31 10:36:31 +02:00