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Lars-Peter Clausen f0e8b7adec axi_adc_trigger: Reduce AXI address width 
The axi_adc_trigger does not use the full width of the AXI interface
address. It only responds to register access in the first 32 registers.

Reduce the size of the AXI address to 7 bit accordingly. This allows the
scripts to correctly infer the internal register map size which will cause
the interconnect to filter out access to these unused register.

This slightly reduces utilization by getting rid of some pipeline
registers.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 		2017-04-18 12:17:41 +02:00
library axi_adc_trigger: Reduce AXI address width 2017-04-18 12:17:41 +02:00
projects m2k: Move the BRAM generation outside of the variable fifo IP 2017-04-18 12:17:40 +02:00
.gitattributes Update .gitattributes 2016-02-12 14:27:35 +02:00
.gitignore Update .gitignore 2016-12-19 15:37:05 +00:00
LICENSE Update LICENSE 2014-03-11 15:06:52 -04:00
Makefile Makefile: Added top level Makefile. Modified behavior of clean and clean-all 2015-04-17 17:22:38 +03:00
README.md README.md: Update the README 2016-03-31 19:42:52 +03:00

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