57 lines
1.9 KiB
Tcl
57 lines
1.9 KiB
Tcl
# ad9434 interface
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create_bd_port -dir I adc_clk_p
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create_bd_port -dir I adc_clk_n
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create_bd_port -dir I -from 11 -to 0 adc_data_p
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create_bd_port -dir I -from 11 -to 0 adc_data_n
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create_bd_port -dir I adc_or_p
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create_bd_port -dir I adc_or_n
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# ad9434
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set axi_ad9434 [create_bd_cell -type ip -vlnv analog.com:user:axi_ad9434:1.0 axi_ad9434]
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# dma for ad9434
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set axi_ad9434_dma [create_bd_cell -type ip -vlnv analog.com:user:axi_dmac:1.0 axi_ad9434_dma]
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set_property -dict [list CONFIG.DMA_TYPE_SRC {2}] $axi_ad9434_dma
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set_property -dict [list CONFIG.DMA_TYPE_DEST {0}] $axi_ad9434_dma
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set_property -dict [list CONFIG.CYCLIC {0}] $axi_ad9434_dma
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set_property -dict [list CONFIG.SYNC_TRANSFER_START {0}] $axi_ad9434_dma
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set_property -dict [list CONFIG.AXI_SLICE_SRC {0}] $axi_ad9434_dma
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set_property -dict [list CONFIG.AXI_SLICE_DEST {0}] $axi_ad9434_dma
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set_property -dict [list CONFIG.DMA_2D_TRANSFER {0}] $axi_ad9434_dma
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set_property -dict [list CONFIG.DMA_DATA_WIDTH_SRC {64}] $axi_ad9434_dma
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# ad9434 connections
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ad_connect sys_200m_clk axi_ad9434/delay_clk
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ad_connect axi_ad9434/adc_clk axi_ad9434_dma/fifo_wr_clk
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ad_connect adc_clk_p axi_ad9434/adc_clk_in_p
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ad_connect adc_clk_n axi_ad9434/adc_clk_in_n
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ad_connect adc_data_p axi_ad9434/adc_data_in_p
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ad_connect adc_data_n axi_ad9434/adc_data_in_n
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ad_connect adc_or_p axi_ad9434/adc_or_in_p
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ad_connect adc_or_n axi_ad9434/adc_or_in_n
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ad_connect axi_ad9434/adc_valid axi_ad9434_dma/fifo_wr_en
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ad_connect axi_ad9434/adc_data axi_ad9434_dma/fifo_wr_din
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ad_connect axi_ad9434/adc_dovf axi_ad9434_dma/fifo_wr_overflow
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# interconnect
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ad_cpu_interconnect 0x44A00000 axi_ad9434
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ad_cpu_interconnect 0x44A30000 axi_ad9434_dma
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# memory inteconnect
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ad_mem_hp1_interconnect sys_200m_clk sys_ps7/S_AXI_HP1
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ad_mem_hp1_interconnect sys_200m_clk axi_ad9434_dma/m_dest_axi
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ad_connect sys_cpu_resetn axi_ad9434_dma/m_dest_axi_aresetn
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# interrupts
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ad_cpu_interrupt ps-13 mb-12 axi_ad9434_dma/irq
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