84 lines
2.4 KiB
Tcl
84 lines
2.4 KiB
Tcl
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global ad7616_if
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# data interfaces
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create_bd_port -dir O rx_sclk
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create_bd_port -dir O rx_sdo
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create_bd_port -dir I rx_sdi_0
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create_bd_port -dir I rx_sdi_1
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create_bd_port -dir O -from 15 -to 0 rx_db_o
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create_bd_port -dir I -from 15 -to 0 rx_db_i
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create_bd_port -dir O rx_db_t
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create_bd_port -dir O rx_rd_n
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create_bd_port -dir O rx_wr_n
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# control lines
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create_bd_port -dir O rx_cnvst
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create_bd_port -dir O rx_cs_n
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create_bd_port -dir I rx_busy
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# instantiation
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set axi_ad7616 [create_bd_cell -type ip -vlnv analog.com:user:axi_ad7616:1.0 axi_ad7616]
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set_property -dict [list CONFIG.IF_TYPE $ad7616_if] $axi_ad7616
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set axi_ad7616_dma [create_bd_cell -type ip -vlnv analog.com:user:axi_dmac:1.0 axi_ad7616_dma]
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set_property -dict [list CONFIG.DMA_TYPE_SRC {2}] $axi_ad7616_dma
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set_property -dict [list CONFIG.DMA_TYPE_DEST {0}] $axi_ad7616_dma
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set_property -dict [list CONFIG.CYCLIC {0}] $axi_ad7616_dma
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set_property -dict [list CONFIG.DMA_2D_TRANSFER {0}] $axi_ad7616_dma
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set_property -dict [list CONFIG.DMA_DATA_WIDTH_SRC {16}] $axi_ad7616_dma
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set_property -dict [list CONFIG.DMA_DATA_WIDTH_DEST {64}] $axi_ad7616_dma
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# interface connections
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if {$ad7616_if == 0} {
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ad_connect rx_sclk axi_ad7616/rx_sclk
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ad_connect rx_sdo axi_ad7616/rx_sdo
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ad_connect rx_sdi_0 axi_ad7616/rx_sdi_0
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ad_connect rx_sdi_1 axi_ad7616/rx_sdi_1
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ad_connect rx_cs_n axi_ad7616/rx_cs_n
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ad_connect rx_cnvst axi_ad7616/rx_cnvst
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ad_connect rx_busy axi_ad7616/rx_busy
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} else {
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ad_connect rx_db_o axi_ad7616/rx_db_o
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ad_connect rx_db_i axi_ad7616/rx_db_i
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ad_connect rx_db_t axi_ad7616/rx_db_t
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ad_connect rx_rd_n axi_ad7616/rx_rd_n
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ad_connect rx_wr_n axi_ad7616/rx_wr_n
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ad_connect rx_cs_n axi_ad7616/rx_cs_n
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ad_connect rx_cnvst axi_ad7616/rx_cnvst
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ad_connect rx_busy axi_ad7616/rx_busy
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}
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ad_connect sys_cpu_clk axi_ad7616_dma/s_axi_aclk
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ad_connect sys_cpu_clk axi_ad7616_dma/fifo_wr_clk
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ad_connect axi_ad7616/adc_valid axi_ad7616_dma/fifo_wr_en
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ad_connect axi_ad7616/adc_data axi_ad7616_dma/fifo_wr_din
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ad_connect axi_ad7616/adc_sync axi_ad7616_dma/fifo_wr_sync
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# interconnect
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ad_cpu_interconnect 0x44A00000 axi_ad7616
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ad_cpu_interconnect 0x44A30000 axi_ad7616_dma
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# memory interconnect
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ad_mem_hp1_interconnect sys_cpu_clk sys_ps7/S_AXI_HP1
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ad_mem_hp1_interconnect sys_cpu_clk axi_ad7616_dma/m_dest_axi
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ad_connect sys_cpu_resetn axi_ad7616_dma/m_dest_axi_aresetn
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# interrupts
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ad_cpu_interrupt ps-13 mb-12 axi_ad7616_dma/irq
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ad_cpu_interrupt ps-12 mb-13 axi_ad7616/irq
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