70 lines
2.7 KiB
Makefile
70 lines
2.7 KiB
Makefile
####################################################################################
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## Copyright (c) 2018 - 2023 Analog Devices, Inc.
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### SPDX short identifier: BSD-1-Clause
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## Auto-generated, do not modify!
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####################################################################################
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LIBRARY_NAME := axi_ad9361
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GENERIC_DEPS += ../common/ad_addsub.v
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GENERIC_DEPS += ../common/ad_datafmt.v
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GENERIC_DEPS += ../common/ad_dds.v
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GENERIC_DEPS += ../common/ad_dds_1.v
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GENERIC_DEPS += ../common/ad_dds_2.v
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GENERIC_DEPS += ../common/ad_dds_cordic_pipe.v
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GENERIC_DEPS += ../common/ad_dds_sine.v
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GENERIC_DEPS += ../common/ad_dds_sine_cordic.v
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GENERIC_DEPS += ../common/ad_iqcor.v
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GENERIC_DEPS += ../common/ad_pnmon.v
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GENERIC_DEPS += ../common/ad_pps_receiver.v
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GENERIC_DEPS += ../common/ad_rst.v
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GENERIC_DEPS += ../common/ad_tdd_control.v
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GENERIC_DEPS += ../common/up_adc_channel.v
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GENERIC_DEPS += ../common/up_adc_common.v
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GENERIC_DEPS += ../common/up_axi.v
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GENERIC_DEPS += ../common/up_clock_mon.v
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GENERIC_DEPS += ../common/up_dac_channel.v
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GENERIC_DEPS += ../common/up_dac_common.v
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GENERIC_DEPS += ../common/up_delay_cntrl.v
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GENERIC_DEPS += ../common/up_tdd_cntrl.v
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GENERIC_DEPS += ../common/up_xfer_cntrl.v
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GENERIC_DEPS += ../common/up_xfer_status.v
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GENERIC_DEPS += axi_ad9361.v
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GENERIC_DEPS += axi_ad9361_rx.v
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GENERIC_DEPS += axi_ad9361_rx_channel.v
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GENERIC_DEPS += axi_ad9361_rx_pnmon.v
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GENERIC_DEPS += axi_ad9361_tdd.v
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GENERIC_DEPS += axi_ad9361_tdd_if.v
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GENERIC_DEPS += axi_ad9361_tx.v
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GENERIC_DEPS += axi_ad9361_tx_channel.v
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XILINX_DEPS += ../common/ad_pps_receiver_constr.ttcl
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XILINX_DEPS += ../xilinx/common/ad_data_clk.v
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XILINX_DEPS += ../xilinx/common/ad_data_in.v
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XILINX_DEPS += ../xilinx/common/ad_data_out.v
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XILINX_DEPS += ../xilinx/common/ad_dcfilter.v
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XILINX_DEPS += ../xilinx/common/ad_mul.v
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XILINX_DEPS += ../xilinx/common/ad_rst_constr.xdc
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XILINX_DEPS += ../xilinx/common/up_clock_mon_constr.xdc
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XILINX_DEPS += ../xilinx/common/up_xfer_cntrl_constr.xdc
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XILINX_DEPS += ../xilinx/common/up_xfer_status_constr.xdc
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XILINX_DEPS += axi_ad9361_constr.xdc
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XILINX_DEPS += axi_ad9361_ip.tcl
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XILINX_DEPS += xilinx/axi_ad9361_cmos_if.v
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XILINX_DEPS += xilinx/axi_ad9361_lvds_if.v
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INTEL_DEPS += ../intel/common/ad_dcfilter.v
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INTEL_DEPS += ../intel/common/ad_mul.v
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INTEL_DEPS += ../intel/common/up_clock_mon_constr.sdc
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INTEL_DEPS += ../intel/common/up_rst_constr.sdc
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INTEL_DEPS += ../intel/common/up_xfer_cntrl_constr.sdc
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INTEL_DEPS += ../intel/common/up_xfer_status_constr.sdc
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INTEL_DEPS += axi_ad9361_constr.sdc
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INTEL_DEPS += axi_ad9361_hw.tcl
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INTEL_DEPS += intel/axi_ad9361_cmos_if.v
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INTEL_DEPS += intel/axi_ad9361_lvds_if.v
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INTEL_DEPS += intel/axi_ad9361_lvds_if_10.v
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INTEL_DEPS += intel/axi_ad9361_lvds_if_c5.v
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include ../scripts/library.mk
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