42 lines
2.0 KiB
Plaintext
42 lines
2.0 KiB
Plaintext
###############################################################################
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## Copyright (C) 2020-2023 Analog Devices, Inc. All rights reserved.
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### SPDX short identifier: ADIBSD
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###############################################################################
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set_false_path -quiet -from [get_cells -quiet -hier *in_toggle_d1_reg* -filter {NAME =~ *i_serdes* && IS_SEQUENTIAL}]
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set_false_path -quiet -from [get_cells -quiet -hier *out_toggle_d1_reg* -filter {NAME =~ *i_serdes* && IS_SEQUENTIAL}]
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set_false_path -through [get_pins -hier *i_idelay/CNTVALUEOUT]
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set_false_path -through [get_pins -hier *i_idelay/CNTVALUEIN]
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# sync bits i_rx1_ctrl_sync
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set_false_path \
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-to [get_cells -quiet -hier *cdc_sync_stage1_reg* \
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-filter {NAME =~ *i_rx1_ctrl_sync* && IS_SEQUENTIAL}]
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# sync bits i_tx1_ctrl_sync
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set_false_path \
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-to [get_cells -quiet -hier *cdc_sync_stage1_reg* \
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-filter {NAME =~ *i_tx1_ctrl_sync* && IS_SEQUENTIAL}]
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# sync event i_rx_external_sync
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set_false_path \
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-from [get_pins -hierarchical * -filter {NAME=~*i_rx_external_sync/out_toggle_d1_reg/C}] \
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-to [get_pins -hierarchical * -filter {NAME=~*i_rx_external_sync/i_sync_in/cdc_sync_stage1_reg[0]/D}]
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set_false_path \
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-from [get_pins -hierarchical * -filter {NAME=~*i_rx_external_sync/in_toggle_d1_reg/C}] \
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-to [get_pins -hierarchical * -filter {NAME=~*i_rx_external_sync/i_sync_out/cdc_sync_stage1_reg[0]/D}]
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# sync event i_tx_external_sync
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set_false_path \
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-from [get_pins -hierarchical * -filter {NAME=~*i_tx_external_sync/out_toggle_d1_reg/C}] \
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-to [get_pins -hierarchical * -filter {NAME=~*i_tx_external_sync/i_sync_in/cdc_sync_stage1_reg[0]/D}]
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set_false_path \
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-from [get_pins -hierarchical * -filter {NAME=~*i_tx_external_sync/in_toggle_d1_reg/C}] \
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-to [get_pins -hierarchical * -filter {NAME=~*i_tx_external_sync/i_sync_out/cdc_sync_stage1_reg[0]/D}]
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# mssi_sync
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set_false_path \
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-to [get_cells -quiet -hier *mssi_sync_d_reg* \
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-filter {NAME =~ *i_*_phy* && IS_SEQUENTIAL}]
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