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jesd204: Xilinx: NP=12 support
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2021-02-05 15:24:15 +02:00 |
Makefile
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jesd204: Xilinx: NP=12 support
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2021-02-05 15:24:15 +02:00 |
align_mux.v
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jesd204: Add support for 8-byte JESD204B, frame alignment character insertion/replacement
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2021-02-05 15:24:15 +02:00 |
elastic_buffer.v
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jesd204: Xilinx: NP=12 support
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2021-02-05 15:24:15 +02:00 |
error_monitor.v
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jesd204_rx: 64b mode support for receive peripheral
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2020-02-10 09:47:07 +02:00 |
jesd204_ilas_monitor.v
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jesd204: Add support for 8-byte JESD204B, frame alignment character insertion/replacement
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2021-02-05 15:24:15 +02:00 |
jesd204_lane_latency_monitor.v
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jesd204: Add support for 8-byte JESD204B, frame alignment character insertion/replacement
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2021-02-05 15:24:15 +02:00 |
jesd204_rx.v
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jesd204: Expose core synthesis parameters through registers
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2021-02-05 15:24:15 +02:00 |
jesd204_rx_cgs.v
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Add missing timescale annotations
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2018-10-17 10:32:47 +03:00 |
jesd204_rx_constr.sdc
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jesd204: Intel: NP12 support
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2021-02-05 15:24:15 +02:00 |
jesd204_rx_constr.ttcl
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jesd204: Xilinx: NP=12 support
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2021-02-05 15:24:15 +02:00 |
jesd204_rx_ctrl.v
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jesd204: Add support for 8-byte JESD204B, frame alignment character insertion/replacement
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2021-02-05 15:24:15 +02:00 |
jesd204_rx_ctrl_64b.v
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jesd204_rx: Interrupt for unexpected lane status error
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2020-07-31 11:43:41 +03:00 |
jesd204_rx_frame_align.v
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jesd204: Xilinx: NP=12 support
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2021-02-05 15:24:15 +02:00 |
jesd204_rx_header.v
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jesd204_rx: 64b mode support for receive peripheral
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2020-02-10 09:47:07 +02:00 |
jesd204_rx_hw.tcl
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jesd204: Intel: NP12 support
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2021-02-05 15:24:15 +02:00 |
jesd204_rx_ip.tcl
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jesd204: Expose core synthesis parameters through registers
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2021-02-05 15:24:15 +02:00 |
jesd204_rx_lane.v
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jesd204: Xilinx: NP=12 support
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2021-02-05 15:24:15 +02:00 |
jesd204_rx_lane_64b.v
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jesd204_rx:64b: Remove reset
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2021-03-08 10:46:52 +02:00 |