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stefan.raus adad6c930d ad9081_fmca_ebz_qsys.tcl: Add RX_LANE_RATE and TX_LANE_RATE parameters 
For ad9081/a10soc project, the RX_LANE_RATE and TX_LANE_RATE were computed
from SAMPLE_RATE. Remove SAMPLE_RATE and add RX_LANE_RATE and TX_LANE_RATE
as parameters. Update also computation examples from comments.

Signed-off-by: stefan.raus <stefan.raus@analog.com>
 		2021-11-12 13:04:57 +02:00
..
a10soc ad9081_fmca_ebz_qsys.tcl: Add RX_LANE_RATE and TX_LANE_RATE parameters 2021-11-12 13:04:57 +02:00
common ad9081_fmca_ebz_qsys.tcl: Add RX_LANE_RATE and TX_LANE_RATE parameters 2021-11-12 13:04:57 +02:00
vck190 projects/ad9081_fmca_ebz: Updated makefiles 2021-10-05 16:56:57 +03:00
vcu118 projects/ad9081_fmca_ebz: Updated makefiles 2021-10-05 16:56:57 +03:00
zc706 projects/ad9081_fmca_ebz: Updated makefiles 2021-10-05 16:56:57 +03:00
zcu102 projects/ad9081_fmca_ebz: Updated makefiles 2021-10-05 16:56:57 +03:00
Makefile Makefiles: Update header with the appropriate license 2021-09-16 16:50:53 +03:00
Readme.md start adding some doc to the ./projects directory 2021-11-10 14:01:06 +02:00

Readme.md

AD9081-FMCA-EBZ HDL Project

Here are some pointers to help you: