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Robin Getz 63b6711cfa start adding some doc to the ./projects directory 
This adds a Readme.md to each project directory with pointers to project
documentation in the wiki, and the drivers (if they exist). This will
help with some autogenerated doc in the wiki, that is generated with the
innovatily named "wiki_summary.sh" shell script that parses through
these Readme.md files, and generates a summary table.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Iacob Liviu Mihai <liviu.iacob@analog.com>
 		2021-11-10 14:01:06 +02:00
..
ccbob_cmos Makefiles: Update header with the appropriate license 2021-09-16 16:50:53 +03:00
ccbob_lvds Makefiles: Update header with the appropriate license 2021-09-16 16:50:53 +03:00
ccfmc_lvds Makefiles: Update header with the appropriate license 2021-09-16 16:50:53 +03:00
ccpackrf_lvds Makefiles: Update header with the appropriate license 2021-09-16 16:50:53 +03:00
common Correct constraints file pin mapping 2021-05-25 16:27:58 +03:00
Makefile Makefiles: Update header with the appropriate license 2021-09-16 16:50:53 +03:00
Readme.md start adding some doc to the ./projects directory 2021-11-10 14:01:06 +02:00

Readme.md

ADRV9361Z7035 SDR SOM

This folder contains the ADRV9361Z7035 SOM projects for each of the carrier boards.

Supported SOM & Carriers

Directory Description
ccbob_cmos ADRV9361Z7035-SOM (CMOS Mode) + ADRV1CRR-BOB
ccbob_lvds ADRV9361Z7035-SOM (LVDS Mode) + ADRV1CRR-BOB
ccpackrf_lvds ADRV9361Z7035-SOM (LVDS Mode) + ADRV1CRR-PACKRF
ccfmc_lvds ADRV9361Z7035-SOM (LVDS Mode) + ADRV1CRR-FMC
ccpci_lvds ADRV9361Z7035-SOM (LVDS Mode) + ADRV1CRR-PCI
ccusb_lvds ADRV9361Z7035-SOM (LVDS Mode) + ADRV1CRR-USB

Board Design Files (Vivado IPI)

Directory/File Description
common/adrv9361z7035_bd.tcl ADRV9361Z7035-SOM board design file.
common/ccbob_bd.tcl carrier, break out board design file.
common/ccpackrf_bd.tcl carrier, pack rf board design file.
common/ccfmc_bd.tcl carrier, fmc board design file.
common/ccpci_bd.tcl carrier, pci-e board design file.
common/ccusb_bd.tcl carrier, usb board design file.

FMC & BOB carrier designs includes loopback daughtercards for connectivity testing.

Board Constraint Files (pin-out & io-standard)

Directory/File Description
common/adrv9361z7035_constr.xdc ADRV9361Z7035-SOM base constraints file.
common/adrv9361z7035_constr_cmos.xdc ADRV9361Z7035-SOM CMOS mode constraints file.
common/adrv9361z7035_constr_lvds.xdc ADRV9361Z7035-SOM LVDS mode constraints file.
common/ccbob_constr.xdc carrier, break out board constraints file.
common/ccpackrf_constr.xdc carrier, packrf board constraints file.
common/ccfmc_constr.xdc carrier, fmc board constraints file.
common/ccpci_constr.xdc carrier, pci-e board constraints file.
common/ccusb_constr.xdc carrier, usb board constraints file.

FMC & BOB carrier designs includes loopback daughtercards for connectivity testing.

Building, Generating Bit Files (easy & efficient method)

[some-directory]> git clone -b dev git@github.com:analogdevicesinc/hdl.git
[some-directory]> make -C hdl/projects/adrv9361z7035/ccbob_cmos

Building, Generating Elf Files (easy & efficient method)

[some-directory]> git clone -b dev git@github.com:analogdevicesinc/no-OS.git
[some-directory]> make -C no-OS/adrv9361z7035/ccbob_cmos

Running, a quick test (easy & efficient method)

[some-directory]> make -C no-OS/adrv9361z7035/ccbob_cmos run

ADRV9361Z7035 HDL Project

Here are some pointers to help you: