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python-schdoc/tests/altium_crap/Soft Designs/Communication/NB3000 IR38KRX/Ir_Receiver.Constraint

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initial commit of altium sample files and python code
2016-09-30 09:43:38 +00:00
;-------------------------------------------------------------------------------
;Constraints File
; Device : Any
; Board : NanoBoard 3000 Series
; Project : Ir_Receiver.PrjFpg
;
; Created 30-Jun-2009
; Altium Limited
;-------------------------------------------------------------------------------
;-------------------------------------------------------------------------------
Record=FileHeader | Id=DXP Constraints v1.0
;-------------------------------------------------------------------------------
;-------------------------------------------------------------------------------
Record=Constraint | TargetKind=Port | TargetId=CLK_BRD | FPGA_CLOCK=TRUE
Record=Constraint | TargetKind=Port | TargetId=CLK_BRD | FPGA_CLOCK_FREQUENCY=50 Mhz
Record=Constraint | TargetKind=Port | TargetId=JTAG_NEXUS_TCK | FPGA_CLOCK=TRUE
Record=Constraint | TargetKind=Port | TargetId=JTAG_NEXUS_TCK | FPGA_CLOCK_FREQUENCY=1 Mhz
;-------------------------------------------------------------------------------