2020-03-04 03:33:56 +00:00
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# Altium-Schematic-Parser
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Converts Altium .SchDoc files into json
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2020-03-04 08:31:46 +00:00
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## Prerequisites
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* python 3
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* olefile
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2020-03-04 04:25:40 +00:00
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## Install
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2020-03-04 08:31:46 +00:00
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git clone git@github.com:a3ng7n/Altium-Schematic-Parser.git
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2020-03-04 09:01:01 +00:00
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cd Altium-Schematic-Parser
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pip install -e .
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2020-03-04 04:25:40 +00:00
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## Usage
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2020-04-15 20:58:21 +00:00
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Full description
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usage: parse.py [-h] [-o OUTPUT]
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[-f {all-list,all-hierarchy,parts-list,net-list}]
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input
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Ex: to export all contents of altiumschematic.schdoc to jsonfile.json within path/to/:
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python parse.py "path/to/altiumschematic.schdoc" -o "path/to/jsonfile.json"
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**NOTE**:
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the default output formatting behavior (-f/--format) if not supplied is to show all contents
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retaining all hierarchy information
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## Command line arguments
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positional arguments:
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input path/to/altiumschematic.schdoc file to parse
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optional arguments:
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-h, --help show this help message and exit
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-o OUTPUT, --output OUTPUT
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path/to/jsonfile.json file to output json to, otherwise prints to terminal
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-f {all-list,all-hierarchy,parts-list,net-list}, --format {all-list,all-hierarchy,parts-list,net-list}
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all-list: All records in a flattened list
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all-hierarchy: All records in an owner/child "hierarchy"
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parts-list: A listing of parts and their designators
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net-list: A listing of nets between parts pins, referred to by their designators
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2020-03-07 07:14:43 +00:00
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# Notes
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## schdoc file format
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Record ids:
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2020-03-07 08:01:22 +00:00
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* 1: a part, type identified by either "LIBREFERENCE" or "DESIGNITEMID"
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2020-04-15 20:00:29 +00:00
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* 2: a pin on a part, with types indicated by "ELECTRICAL"
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* 4: "Passive"
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* 7: "Power"
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* 4: a "Annotation", which appears to just be a text box for referential purposes
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2020-03-07 07:14:43 +00:00
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* 6: a "drawing" I think... "Xn"/"Yn" are values of where a line should be drawn
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2020-04-15 20:00:29 +00:00
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* 17: a "Power Port", used commonly as GND or VCC, identified by "TEXT", "LOCATION.X", "LOCATION.Y",
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and a symbol denoted by "STYLE"
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* 25: a "Net Label", which is similar to a "Power Port" in giving net designation to a wire,
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but doesn't come with a symbol (aka STYLE)
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* 27: a "Wire", aka connecting line used to determine net associations
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2020-03-07 08:01:22 +00:00
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* 34: a designator?
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2020-04-15 20:00:29 +00:00
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* 41: text associated with an "OWNERPARTID" - lots of different types indicated by "NAME"
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2020-03-07 07:14:43 +00:00
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* PinUniqueId: I suspect a unique id for the associated pin
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* Fitted: ...wat?
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* Comment: self explanatory
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2020-03-07 08:01:22 +00:00
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* 44: a container of "models" aka record 45's - see below
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2020-03-07 07:14:43 +00:00
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* 45: appears to be a reference to which "model" a particular part can be represented by. Since this is just a
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2020-04-15 20:00:29 +00:00
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possible model, the one actually selected for a given part will have the "ISCURRENT" flag set to "T"
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## Net Association
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Altium seems to have a very very very bizarre way of designating or determining the designation of what is a net,
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and what's connected to that net.
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