;-------------------------------------------------------------------------------
;Constraints File
;   Device  : Any
;   Board   : NanoBoard 3000 Series
;   Project : Ir_Receiver.PrjFpg
;
;   Created 30-Jun-2009
;   Altium Limited
;-------------------------------------------------------------------------------

;-------------------------------------------------------------------------------
Record=FileHeader | Id=DXP Constraints v1.0
;-------------------------------------------------------------------------------

;-------------------------------------------------------------------------------
Record=Constraint | TargetKind=Port | TargetId=CLK_BRD              | FPGA_CLOCK=TRUE
Record=Constraint | TargetKind=Port | TargetId=CLK_BRD              | FPGA_CLOCK_FREQUENCY=50 Mhz
Record=Constraint | TargetKind=Port | TargetId=JTAG_NEXUS_TCK       | FPGA_CLOCK=TRUE
Record=Constraint | TargetKind=Port | TargetId=JTAG_NEXUS_TCK       | FPGA_CLOCK_FREQUENCY=1 Mhz
;-------------------------------------------------------------------------------