22 lines
1.0 KiB
Plaintext
22 lines
1.0 KiB
Plaintext
;-------------------------------------------------------------------------------
|
|
;Constraints File
|
|
; Device : Any
|
|
; Board : Any
|
|
; Project : Multiple_Custom_Instruments.PrjFpg
|
|
;
|
|
; Created 18-December-2003
|
|
; Altium Limited
|
|
;-------------------------------------------------------------------------------
|
|
|
|
;-------------------------------------------------------------------------------
|
|
Record=FileHeader | Id=DXP Constraints v1.0
|
|
;-------------------------------------------------------------------------------
|
|
|
|
;-------------------------------------------------------------------------------
|
|
Record=Constraint | TargetKind=Port | TargetId=CLK_BRD | FPGA_CLOCK=TRUE
|
|
Record=Constraint | TargetKind=Port | TargetId=CLK_BRD | FPGA_CLOCK_FREQUENCY=50 Mhz
|
|
Record=Constraint | TargetKind=Port | TargetId=JTAG_NEXUS_TCK | FPGA_CLOCK=TRUE
|
|
Record=Constraint | TargetKind=Port | TargetId=JTAG_NEXUS_TCK | FPGA_CLOCK_FREQUENCY=1 Mhz
|
|
;-------------------------------------------------------------------------------
|
|
|