python-schdoc/tests/altium_crap/Circuit Sim/RIAA Amplifier/Out/RIAA Amplifier.nsx

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RIAA Amplifier
*SPICE Netlist generated by Advanced Sim server on 11/06/2002 4:31:21 PM
*Schematic Netlist:
C1 IN 0 36pF
C2 P1 G2 0.1uF
C3 K3 N2 0.47uF
C4 N2 OUT 0.47uF
C5 K1 N1 3255pF
C6 N1 N2 1000pF
R1 IN 0 47.5k
R2 K1 0 1.82k
R3 G2 0 1MEG
R4 K2 0 1k
R5 VPLATE P1 300k
R6 VPLATE P2 100k
R7 K3 0 100k
R8 K1 N1 1475k
R9 N1 N2 75k
RL OUT 0 100k
XV1 P1 IN K1 12AX7
XV2 P2 G2 K2 12AX7
XV3 VPLATE P2 K3 12AX7
VP VPLATE 0 +250V
Vin IN 0 DC 0 SIN(0 5m 1k 0 0) AC 1 0
.SAVE 0 G2 IN K1 K2 K3 N1 N2 OUT P1 P2 VPLATE Vin#branch VP#branch @Vin[z] @VP[z]
*PLOT TRAN -1 1 A=IN A=OUT A=VIN#branch A=VP#branch A=VPLATE
*PLOT OP -1 1 A=IN A=OUT A=VIN#branch A=VP#branch A=VPLATE
*Selected Circuit Analyses:
.TRAN 2E-5 0.005 0 2E-5
.OP
*Models and Subcircuit:
.SUBCKT 12AX7 1 3 4
B1 2 4 I=((URAMP((V(2,4)/85)+V(3,4)))^1.5)/580
C1 3 4 1.6E-12
C2 3 1 1.7E-12
C3 1 4 0.46E-12
R1 3 5 50E+3
D1 1 2 DX
D2 4 2 DX2
D3 5 4 DX
.MODEL DX D(IS=1.0E-12 RS=1.0)
.MODEL DX2 D(IS=1.0E-9 RS=1.0)
.ENDS X12AX7
.END