Altium-Schematic-Parser

Converts Altium .SchDoc files into json

Prerequisites

git clone git@github.com:a3ng7n/Altium-Schematic-Parser.git
cd Altium-Schematic-Parser
pip install -e .

python parse.py -i "path/to/altiumschematic.schdoc" -o "path/to/jsonfile.json"

Record ids:

1: a part, type identified by either "LIBREFERENCE" or "DESIGNITEMID"
2: a pin on a part, with types indicated by "ELECTRICAL"
- 4: "Passive"
- 7: "Power"
4: a "Annotation", which appears to just be a text box for referential purposes
6: a "drawing" I think... "Xn"/"Yn" are values of where a line should be drawn
17: a "Power Port", used commonly as GND or VCC, identified by "TEXT", "LOCATION.X", "LOCATION.Y", and a symbol denoted by "STYLE"
25: a "Net Label", which is similar to a "Power Port" in giving net designation to a wire, but doesn't come with a symbol (aka STYLE)
27: a "Wire", aka connecting line used to determine net associations
34: a designator?
41: text associated with an "OWNERPARTID" - lots of different types indicated by "NAME"
- PinUniqueId: I suspect a unique id for the associated pin
- Fitted: ...wat?
- Comment: self explanatory
44: a container of "models" aka record 45's - see below
45: appears to be a reference to which "model" a particular part can be represented by. Since this is just a possible model, the one actually selected for a given part will have the "ISCURRENT" flag set to "T"

Altium seems to have a very very very bizarre way of designating or determining the designation of what is a net, and what's connected to that net.