python-schdoc/altium_crap/Soft Designs/Audio/NB3000 MP3 Decoder/NB3000_MP3_Decoder.Constraint

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;-------------------------------------------------------------------------------
;Constraints File
; Device : Any
; Board : Nanoboard 2
; Project : MP3_Decoder.PrjFpg
;
; Created 22-Feb-2010
; Altium Limited
;-------------------------------------------------------------------------------
;-------------------------------------------------------------------------------
Record=FileHeader | Id=DXP Constraints v1.0
;-------------------------------------------------------------------------------
;-------------------------------------------------------------------------------
Record=Constraint | TargetKind=Port | TargetId=CLK_REF | FPGA_CLOCK=TRUE
Record=Constraint | TargetKind=Port | TargetId=CLK_REF | FPGA_CLOCK_FREQUENCY=20 Mhz
Record=Constraint | TargetKind=Port | TargetId=CLK_BRD | FPGA_CLOCK=TRUE
Record=Constraint | TargetKind=Port | TargetId=CLK_BRD | FPGA_CLOCK_FREQUENCY=34 Mhz
Record=Constraint | TargetKind=Port | TargetId=JTAG_NEXUS_TCK | FPGA_CLOCK=TRUE
Record=Constraint | TargetKind=Port | TargetId=JTAG_NEXUS_TCK | FPGA_CLOCK_FREQUENCY=1 Mhz
;-------------------------------------------------------------------------------