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python-schdoc/altium_crap/Soft Designs/Communication/SPI Arbiter/SPI_Arbiter.PrjFpgStructure

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Record=SheetSymbol|SourceDocument=SPI_Arbiter.schdoc|Designator=U_SPI_Arbiter_System|SchDesignator=U_SPI_Arbiter_System|FileName=SPI_Arbiter_System.OpenBus|SymbolType=Normal|RawFileName=SPI_Arbiter_System.OpenBus|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol
Record=SubProject|ProjectPath=embedded\SPI_Arbiter.PrjEmb
Record=TopLevelDocument|FileName=SPI_Arbiter.schdoc
Record=NEXUS_CORE|ComponentDesignator=MCU|BaseComponentDesignator=MCU|DocumentName=SPI_Arbiter_System.OpenBus|LibraryReference=TSK3000A|NexusDeviceId=TSK3000A|SubProjectPath=embedded\SPI_Arbiter.PrjEmb|NEXUS_JTAG_INDEX=0|ComponentUniqueID=RKPALOBQ|Description=OpenBus Component|ChildModel1=TSK3000A_MCU|ChildModel2=TSK3000A_MDU|ChildModel3=TSK3000A_OCDS|ChildModel4=TSK3000A_Shift_Barrel|ChildModel5=TSK3000A_Shift_Sequential|ChildModel6=Mult_32x32|ChildModel7=m33x33|Comment= |Component Kind=Standard|ComponentLink1Description=Core &Resource Usage|ComponentLink1URL=CR0140 FPGA Processor Resource Usage.pdf#page=22|ComponentLink2Description=Embedded &Tools Guide|ComponentLink2URL=GU0111 Using the TSK3000 Embedded Tools.pdf|ComponentLink3Description=Embedded T&echnical References|ComponentLink3URL=TR0109 TSK3000 Embedded Tools Reference.pdf|ConfigurationParameters={}Version[1.0]{}Option_Processor[0]{}Option_Memory[5]{}Option_MDU[0]{}Option_OCDS[0]{}Option_Shifter[0]{}Option_InterruptCount[32]{}Option_DebugWhenReset[0]{}|ConfiguratorName=FPGA_MCU32|ExportedInterrupts=0000000000000000,FFFFFFFF,FFFFFFFF|Footprint= |HelpURL=CR0121 TSK3000A 32 bit RISC Processor.pdf|LastRevisionNo=1.00.00|Library Name= |Library Reference=TSK3000A|Memory_Configuration=Record[AUTOIMPORT]{}AutoImport_Memory[True]{}AutoImport_Peripherals[True]{n}Record[NEXUS_CORE]{}ComponentDesignator[MCU]{}Memory_Depth[32768]{}Memory_UsageType[rom]{}ProgramDownloadAddress[0x0]{}Memory_BusType[TSK3000:addr_bus]{}Memory_Mau[8]{}Memory_MatchedComponent[]{}Memory_Description[]{}Memory_FillBitPattern[]{}Memory_IncludeDependencies[False]{}Memory_ByLoadAddress[False]{}Memory_Interrupts[]{n}Record[NEXUS_CORE]{}ComponentDesignator[SRAM]{}Memory_Depth[0x100000]{}Memory_UsageType[ram]{}ProgramDownloadAddress[0x1000000]{}Memory_BusType[TSK3000:addr_bus]{}Memory_Mau[8]{}Memory_MatchedComponent[]{}Memory_Description[INTERCON_MEM]{}Memory_FillBitPattern[]{}Memory_IncludeDependencies[False]{}Memory_ByLoadAddress[False]{}Memory_Interrupts[]{n}Record[PHYSICAL_MEMORY]{}ComponentDesignator[MCU]{}Memory_Depth[32768]{}Memory_UsageType[rom]{}ProgramDownloadAddress[0x0]{}Memory_BusType[TSK3000:addr_bus]{}Memory_Mau[8]{}Memory_MatchedComponent[]{}Memory_Description[]{}Memory_FillBitPattern[]{}Memory_IncludeDependencies[False]{}Memory_ByLoadAddress[False]{}Memory_Interrupts[]{n}Record[PHYSICAL_MEMORY]{}ComponentDesignator[SRAM]{}Memory_Depth[0x100000]{}Memory_UsageType[ram]{}ProgramDownloadAddress[0x1000000]{}Memory_BusType[TSK3000:addr_bus]{}Memory_Mau[8]{}Memory_MatchedComponent[]{}Memory_Description[INTERCON_MEM]{}Memory_FillBitPattern[]{}Memory_IncludeDependencies[False]{}Memory_ByLoadAddress[False]{}Memory_Interrupts[]{n}Record[CODE_EXPORT]{}ExportType[]{n}Record[PERIPHERAL]{}ComponentDesignator[SOFT_TERMINAL]{}Memory_Depth[0x0010]{}Memory_UsageType[peripheral]{}ProgramDownloadAddress[0xFF000000]{}Memory_BusType[TSK3000:addr_bus]{}Memory_Mau[8]{}Memory_MatchedComponent[]{}Memory_Description[INTERCON_IO]{}Memory_FillBitPattern[]{}Memory_IncludeDependencies[False]{}Memory_ByLoadAddress[False]{}Memory_Interrupts[]{n}Record[PERIPHERAL]{}ComponentDesignator[RTC]{}Memory_Depth[0x0008]{}Memory_UsageType[peripheral]{}ProgramDownloadAddress[0xFF010000]{}Memory_BusType[TSK3000:addr_bus]{}Memory_Mau[8]{}Memory_MatchedComponent[]{}Memory_Description[INTERCON_IO]{}Memory_FillBitPattern[]{}Memory_IncludeDependencies[False]{}Memory_ByLoadAddress[False]{}Memory_Interrupts[]{n}|Nexus_Core=Processor_OCDS|Nexus_JTAG_Device=True|Nexus_JTAG_Order=0|PCB3D= |ProgramLogicalTopAddress=0|Published=17-Nov-2004|Publisher=Altium Limited|Signal Integrity= |Simulation=
Record=NEXUS_CORE|ComponentDesignator=SOFT_TERMINAL|BaseComponentDesignator=SOFT_TERMINAL|DocumentName=SPI_Arbiter_System.OpenBus|LibraryReference=TERMINAL|NexusDeviceId=TERMINAL|SubProjectPath= |NEXUS_JTAG_INDEX=1|ComponentUniqueID=QPBYGVAV|Description=OpenBus Component|Comment= |Component Kind=Standard|ComponentLink1Description=Core &Resource Usage|ComponentLink1URL=CR0134 FPGA Instrument Resource Usage.pdf|Footprint= |HelpURL= |InterconOrder=0|LastRevisionNo=1.00.00|Library Name= |Library Reference=TERMINAL|NEXUS_CORE=Instrument|NEXUS_JTAG_DEVICE=True|NEXUS_JTAG_ORDER=0|PCB3D= |Published=03-Jul-2007|Publisher=Altium Limited|Signal Integrity= |Simulation= |UseInDSF=True
Record=NEXUS_CORE_COMPONENT|BaseComponentDesignator=MCU|DocumentName=SPI_Arbiter_System.OpenBus|LibraryReference=TSK3000A|SubProjectPath=embedded\SPI_Arbiter.PrjEmb|Configuration= |Description=OpenBus Component|SubPartUniqueId1=RKPALOBQ|SubPartDocPath1=SPI_Arbiter_System.OpenBus|ChildModel1=TSK3000A_MCU|ChildModel2=TSK3000A_MDU|ChildModel3=TSK3000A_OCDS|ChildModel4=TSK3000A_Shift_Barrel|ChildModel5=TSK3000A_Shift_Sequential|ChildModel6=Mult_32x32|ChildModel7=m33x33|Comment=*|Component Kind=Standard|ComponentLink1Description=Core &Resource Usage|ComponentLink1URL=CR0140 FPGA Processor Resource Usage.pdf#page=22|ComponentLink2Description=Embedded &Tools Guide|ComponentLink2URL=GU0111 Using the TSK3000 Embedded Tools.pdf|ComponentLink3Description=Embedded T&echnical References|ComponentLink3URL=TR0109 TSK3000 Embedded Tools Reference.pdf|ConfigurationParameters={}Version[1.0]{}Option_Processor[0]{}Option_Memory[5]{}Option_MDU[0]{}Option_OCDS[0]{}Option_Shifter[0]{}Option_InterruptCount[32]{}Option_DebugWhenReset[0]{}|ConfiguratorName=FPGA_MCU32|ExportedInterrupts=0000000000000000,FFFFFFFF,FFFFFFFF|Footprint= |HelpURL=CR0121 TSK3000A 32 bit RISC Processor.pdf|LastRevisionNo=1.00.00|Library Name= |Library Reference=TSK3000A|Memory_Configuration=Record[AUTOIMPORT]{}AutoImport_Memory[True]{}AutoImport_Peripherals[True]{n}Record[NEXUS_CORE]{}ComponentDesignator[MCU]{}Memory_Depth[32768]{}Memory_UsageType[rom]{}ProgramDownloadAddress[0x0]{}Memory_BusType[TSK3000:addr_bus]{}Memory_Mau[8]{}Memory_MatchedComponent[]{}Memory_Description[]{}Memory_FillBitPattern[]{}Memory_IncludeDependencies[False]{}Memory_ByLoadAddress[False]{}Memory_Interrupts[]{n}Record[NEXUS_CORE]{}ComponentDesignator[SRAM]{}Memory_Depth[0x100000]{}Memory_UsageType[ram]{}ProgramDownloadAddress[0x1000000]{}Memory_BusType[TSK3000:addr_bus]{}Memory_Mau[8]{}Memory_MatchedComponent[]{}Memory_Description[INTERCON_MEM]{}Memory_FillBitPattern[]{}Memory_IncludeDependencies[False]{}Memory_ByLoadAddress[False]{}Memory_Interrupts[]{n}Record[PHYSICAL_MEMORY]{}ComponentDesignator[MCU]{}Memory_Depth[32768]{}Memory_UsageType[rom]{}ProgramDownloadAddress[0x0]{}Memory_BusType[TSK3000:addr_bus]{}Memory_Mau[8]{}Memory_MatchedComponent[]{}Memory_Description[]{}Memory_FillBitPattern[]{}Memory_IncludeDependencies[False]{}Memory_ByLoadAddress[False]{}Memory_Interrupts[]{n}Record[PHYSICAL_MEMORY]{}ComponentDesignator[SRAM]{}Memory_Depth[0x100000]{}Memory_UsageType[ram]{}ProgramDownloadAddress[0x1000000]{}Memory_BusType[TSK3000:addr_bus]{}Memory_Mau[8]{}Memory_MatchedComponent[]{}Memory_Description[INTERCON_MEM]{}Memory_FillBitPattern[]{}Memory_IncludeDependencies[False]{}Memory_ByLoadAddress[False]{}Memory_Interrupts[]{n}Record[CODE_EXPORT]{}ExportType[]{n}Record[PERIPHERAL]{}ComponentDesignator[SOFT_TERMINAL]{}Memory_Depth[0x0010]{}Memory_UsageType[peripheral]{}ProgramDownloadAddress[0xFF000000]{}Memory_BusType[TSK3000:addr_bus]{}Memory_Mau[8]{}Memory_MatchedComponent[]{}Memory_Description[INTERCON_IO]{}Memory_FillBitPattern[]{}Memory_IncludeDependencies[False]{}Memory_ByLoadAddress[False]{}Memory_Interrupts[]{n}Record[PERIPHERAL]{}ComponentDesignator[RTC]{}Memory_Depth[0x0008]{}Memory_UsageType[peripheral]{}ProgramDownloadAddress[0xFF010000]{}Memory_BusType[TSK3000:addr_bus]{}Memory_Mau[8]{}Memory_MatchedComponent[]{}Memory_Description[INTERCON_IO]{}Memory_FillBitPattern[]{}Memory_IncludeDependencies[False]{}Memory_ByLoadAddress[False]{}Memory_Interrupts[]{n}|Nexus_Core=Processor_OCDS|Nexus_JTAG_Device=True|Nexus_JTAG_Order=0|PCB3D= |ProgramLogicalTopAddress=0|Published=17-Nov-2004|Publisher=Altium Limited|Signal Integrity= |Simulation=
Record=NEXUS_CORE_COMPONENT|BaseComponentDesignator=SOFT_TERMINAL|DocumentName=SPI_Arbiter_System.OpenBus|LibraryReference=TERMINAL|SubProjectPath= |Configuration= |Description=OpenBus Component|SubPartUniqueId1=QPBYGVAV|SubPartDocPath1=SPI_Arbiter_System.OpenBus|Comment=*|Component Kind=Standard|ComponentLink1Description=Core &Resource Usage|ComponentLink1URL=CR0134 FPGA Instrument Resource Usage.pdf|Footprint= |HelpURL= |InterconOrder=0|LastRevisionNo=1.00.00|Library Name= |Library Reference=TERMINAL|NEXUS_CORE=Instrument|NEXUS_JTAG_DEVICE=True|NEXUS_JTAG_ORDER=0|PCB3D= |Published=03-Jul-2007|Publisher=Altium Limited|Signal Integrity= |Simulation= |UseInDSF=True
Record=Configuration|Name=NB2DSK01_08_DB30_06|DeviceName=XC3S1500-4FG676C
Record=Configuration|Name=NB2DSK01_08_DB31_06|DeviceName=EP2C35F672C8
Record=Configuration|Name=NB2DSK01_08_DB32_07|DeviceName=LFECP33E-3FN672C
Record=Configuration|Name=NB2DSK01_08_DB36_01|DeviceName=XC4VLX25-10FF668C
Record=Configuration|Name=NB2DSK01_08_DB40_02|DeviceName=EP3C40F780C8N
Record=Configuration|Name=NB2DSK01_08_DB41_02|DeviceName=XC3S1400AN-4FG676C
Record=Configuration|Name=NB2DSK01_08_DB42_02|DeviceName=XC3SD1800A-4FG676C
Record=Configuration|Name=NB2DSK01_08_DB43_02|DeviceName=LFE2-35E-5F672C
Record=Configuration|Name=NB2DSK01_08_DB46_02|DeviceName=XC4VSX35-10FF668C
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