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python-schdoc/altium_crap/Tutorials/NB3000 Discovery Series/Discovery Session 11/SND2LIGHT.PrjFpgStructure

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Record=SheetSymbol|SourceDocument=SND2LIGHT.SchDoc|Designator=U_SND2LIGHT_OB|SchDesignator=U_SND2LIGHT_OB|FileName=SND2LIGHT_OB.OpenBus|SymbolType=Normal|RawFileName=SND2LIGHT_OB.OpenBus|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol
Record=SubProject|ProjectPath=Embedded\SND2LIGHT.PrjEmb
Record=TopLevelDocument|FileName=SND2LIGHT.SchDoc
Record=NEXUS_CORE|ComponentDesignator=MCU|BaseComponentDesignator=MCU|DocumentName=SND2LIGHT_OB.OpenBus|LibraryReference=TSK3000A|NexusDeviceId=TSK3000A|SubProjectPath=Embedded\SND2LIGHT.PrjEmb|NEXUS_JTAG_INDEX=0|ComponentUniqueID=DSXRBJEA|Description=OpenBus Component|ChildModel1=TSK3000A_MCU|ChildModel2=TSK3000A_MDU|ChildModel3=TSK3000A_OCDS|ChildModel4=TSK3000A_Shift_Barrel|ChildModel5=TSK3000A_Shift_Sequential|ChildModel6=Mult_32x32|ChildModel7=m33x33|Comment= |Component Kind=Standard|ComponentLink1Description=Core &Resource Usage|ComponentLink1URL=CR0140 FPGA Processor Resource Usage.pdf#page=22|ComponentLink2Description=Embedded &Tools Guide|ComponentLink2URL=GU0111 Using the TSK3000 Embedded Tools.pdf|ComponentLink3Description=Embedded T&echnical References|ComponentLink3URL=TR0109 TSK3000 Embedded Tools Reference.pdf|ConfigurationParameters={}Version[1.0]{}Option_Processor[0]{}Option_Memory[5]{}Option_MDU[0]{}Option_OCDS[0]{}Option_Shifter[0]{}Option_InterruptCount[32]{}Option_DebugWhenReset[0]{}|ConfiguratorName=FPGA_MCU32|ExportedInterrupts=0000000000000000,FFFFFFFF,FFFFFFFF|Footprint= |HelpURL=CR0121 TSK3000A 32 bit RISC Processor.pdf|LastRevisionNo=1.00.00|Library Name= |Library Reference=TSK3000A|Memory_Configuration=Record[AUTOIMPORT]{}AutoImport_Memory[True]{}AutoImport_Peripherals[True]{n}Record[NEXUS_CORE]{}ComponentDesignator[MCU]{}Memory_Depth[32768]{}Memory_UsageType[nvram]{}ProgramDownloadAddress[0x0]{}Memory_BusType[TSK3000:addr_bus]{}Memory_Mau[8]{}Memory_MatchedComponent[]{}Memory_Description[]{}Memory_FillBitPattern[]{}Memory_IncludeDependencies[False]{}Memory_ByLoadAddress[False]{}Memory_CopyDuringInit[False]{}Memory_NoCopyDuringInit[False]{}Memory_Interrupts[]{n}Record[NEXUS_CORE]{}ComponentDesignator[SRAM]{}Memory_Depth[0x100000]{}Memory_UsageType[ram]{}ProgramDownloadAddress[0x1000000]{}Memory_BusType[TSK3000:addr_bus]{}Memory_Mau[8]{}Memory_MatchedComponent[]{}Memory_Description[INTERCON_MEM]{}Memory_FillBitPattern[]{}Memory_IncludeDependencies[False]{}Memory_ByLoadAddress[False]{}Memory_CopyDuringInit[False]{}Memory_NoCopyDuringInit[False]{}Memory_Interrupts[]{n}Record[PHYSICAL_MEMORY]{}ComponentDesignator[MCU]{}Memory_Depth[32768]{}Memory_UsageType[nvram]{}ProgramDownloadAddress[0x0]{}Memory_BusType[TSK3000:addr_bus]{}Memory_Mau[8]{}Memory_MatchedComponent[]{}Memory_Description[]{}Memory_FillBitPattern[]{}Memory_IncludeDependencies[False]{}Memory_ByLoadAddress[False]{}Memory_CopyDuringInit[False]{}Memory_NoCopyDuringInit[False]{}Memory_Interrupts[]{n}Record[PHYSICAL_MEMORY]{}ComponentDesignator[SRAM]{}Memory_Depth[0x100000]{}Memory_UsageType[ram]{}ProgramDownloadAddress[0x1000000]{}Memory_BusType[TSK3000:addr_bus]{}Memory_Mau[8]{}Memory_MatchedComponent[]{}Memory_Description[INTERCON_MEM]{}Memory_FillBitPattern[]{}Memory_IncludeDependencies[False]{}Memory_ByLoadAddress[False]{}Memory_CopyDuringInit[False]{}Memory_NoCopyDuringInit[False]{}Memory_Interrupts[]{n}Record[CODE_EXPORT]{}ExportType[]{n}Record[PERIPHERAL]{}ComponentDesignator[I2S]{}Memory_Depth[0x0008]{}Memory_UsageType[peripheral]{}ProgramDownloadAddress[0xFF030000]{}Memory_BusType[TSK3000:addr_bus]{}Memory_Mau[8]{}Memory_MatchedComponent[]{}Memory_Description[INTERCON_IO]{}Memory_FillBitPattern[]{}Memory_IncludeDependencies[False]{}Memory_ByLoadAddress[False]{}Memory_CopyDuringInit[False]{}Memory_NoCopyDuringInit[False]{}Memory_Interrupts[]{n}Record[PERIPHERAL]{}ComponentDesignator[SPI]{}Memory_Depth[0x0008]{}Memory_UsageType[peripheral]{}ProgramDownloadAddress[0xFF010000]{}Memory_BusType[TSK3000:addr_bus]{}Memory_Mau[8]{}Memory_MatchedComponent[]{}Memory_Description[INTERCON_IO]{}Memory_FillBitPattern[]{}Memory_IncludeDependencies[False]{}Memory_ByLoadAddress[False]{}Memory_CopyDuringInit[False]{}Memory_NoCopyDuringInit[False]{}Memory_Interrupts[]{n}Record[PERIPHERAL]{}ComponentDesignator[LEDS]{}Memory_Depth[0x0020]{}Memory_UsageType[peripheral]{}ProgramDownloadAddress[0xFF000000]{}Memory_BusType[TSK3000:addr_bus]{}Memory_Mau[8]{}Memory_MatchedComponent[]{}Memory_Description[INTERCON_IO]{}Memory_FillBitPattern[]{}Memory_IncludeDependencies[False]{}Memory_ByLoadAddress[False]{}Memory_CopyDuringInit[False]{}Memory_NoCopyDuringInit[False]{}Memory_Interrupts[]{n}|Nexus_Core=Processor_OCDS|Nexus_JTAG_Device=True|Nexus_JTAG_Order=0|PCB3D= |ProgramLogicalTopAddress=0|Published=17-Nov-2004|Publisher=Altium Limited|Signal Integrity= |Simulation=
Record=NEXUS_CORE_COMPONENT|BaseComponentDesignator=MCU|DocumentName=SND2LIGHT_OB.OpenBus|LibraryReference=TSK3000A|SubProjectPath=Embedded\SND2LIGHT.PrjEmb|Configuration= |Description=OpenBus Component|NexusDeviceId=TSK3000A|SubPartUniqueId1=DSXRBJEA|SubPartDocPath1=SND2LIGHT_OB.OpenBus|ChildModel1=TSK3000A_MCU|ChildModel2=TSK3000A_MDU|ChildModel3=TSK3000A_OCDS|ChildModel4=TSK3000A_Shift_Barrel|ChildModel5=TSK3000A_Shift_Sequential|ChildModel6=Mult_32x32|ChildModel7=m33x33|Comment=*|Component Kind=Standard|ComponentLink1Description=Core &Resource Usage|ComponentLink1URL=CR0140 FPGA Processor Resource Usage.pdf#page=22|ComponentLink2Description=Embedded &Tools Guide|ComponentLink2URL=GU0111 Using the TSK3000 Embedded Tools.pdf|ComponentLink3Description=Embedded T&echnical References|ComponentLink3URL=TR0109 TSK3000 Embedded Tools Reference.pdf|ConfigurationParameters={}Version[1.0]{}Option_Processor[0]{}Option_Memory[5]{}Option_MDU[0]{}Option_OCDS[0]{}Option_Shifter[0]{}Option_InterruptCount[32]{}Option_DebugWhenReset[0]{}|ConfiguratorName=FPGA_MCU32|ExportedInterrupts=0000000000000000,FFFFFFFF,FFFFFFFF|Footprint= |HelpURL=CR0121 TSK3000A 32 bit RISC Processor.pdf|LastRevisionNo=1.00.00|Library Name= |Library Reference=TSK3000A|Memory_Configuration=Record[AUTOIMPORT]{}AutoImport_Memory[True]{}AutoImport_Peripherals[True]{n}Record[NEXUS_CORE]{}ComponentDesignator[MCU]{}Memory_Depth[32768]{}Memory_UsageType[nvram]{}ProgramDownloadAddress[0x0]{}Memory_BusType[TSK3000:addr_bus]{}Memory_Mau[8]{}Memory_MatchedComponent[]{}Memory_Description[]{}Memory_FillBitPattern[]{}Memory_IncludeDependencies[False]{}Memory_ByLoadAddress[False]{}Memory_CopyDuringInit[False]{}Memory_NoCopyDuringInit[False]{}Memory_Interrupts[]{n}Record[NEXUS_CORE]{}ComponentDesignator[SRAM]{}Memory_Depth[0x100000]{}Memory_UsageType[ram]{}ProgramDownloadAddress[0x1000000]{}Memory_BusType[TSK3000:addr_bus]{}Memory_Mau[8]{}Memory_MatchedComponent[]{}Memory_Description[INTERCON_MEM]{}Memory_FillBitPattern[]{}Memory_IncludeDependencies[False]{}Memory_ByLoadAddress[False]{}Memory_CopyDuringInit[False]{}Memory_NoCopyDuringInit[False]{}Memory_Interrupts[]{n}Record[PHYSICAL_MEMORY]{}ComponentDesignator[MCU]{}Memory_Depth[32768]{}Memory_UsageType[nvram]{}ProgramDownloadAddress[0x0]{}Memory_BusType[TSK3000:addr_bus]{}Memory_Mau[8]{}Memory_MatchedComponent[]{}Memory_Description[]{}Memory_FillBitPattern[]{}Memory_IncludeDependencies[False]{}Memory_ByLoadAddress[False]{}Memory_CopyDuringInit[False]{}Memory_NoCopyDuringInit[False]{}Memory_Interrupts[]{n}Record[PHYSICAL_MEMORY]{}ComponentDesignator[SRAM]{}Memory_Depth[0x100000]{}Memory_UsageType[ram]{}ProgramDownloadAddress[0x1000000]{}Memory_BusType[TSK3000:addr_bus]{}Memory_Mau[8]{}Memory_MatchedComponent[]{}Memory_Description[INTERCON_MEM]{}Memory_FillBitPattern[]{}Memory_IncludeDependencies[False]{}Memory_ByLoadAddress[False]{}Memory_CopyDuringInit[False]{}Memory_NoCopyDuringInit[False]{}Memory_Interrupts[]{n}Record[CODE_EXPORT]{}ExportType[]{n}Record[PERIPHERAL]{}ComponentDesignator[I2S]{}Memory_Depth[0x0008]{}Memory_UsageType[peripheral]{}ProgramDownloadAddress[0xFF030000]{}Memory_BusType[TSK3000:addr_bus]{}Memory_Mau[8]{}Memory_MatchedComponent[]{}Memory_Description[INTERCON_IO]{}Memory_FillBitPattern[]{}Memory_IncludeDependencies[False]{}Memory_ByLoadAddress[False]{}Memory_CopyDuringInit[False]{}Memory_NoCopyDuringInit[False]{}Memory_Interrupts[]{n}Record[PERIPHERAL]{}ComponentDesignator[SPI]{}Memory_Depth[0x0008]{}Memory_UsageType[peripheral]{}ProgramDownloadAddress[0xFF010000]{}Memory_BusType[TSK3000:addr_bus]{}Memory_Mau[8]{}Memory_MatchedComponent[]{}Memory_Description[INTERCON_IO]{}Memory_FillBitPattern[]{}Memory_IncludeDependencies[False]{}Memory_ByLoadAddress[False]{}Memory_CopyDuringInit[False]{}Memory_NoCopyDuringInit[False]{}Memory_Interrupts[]{n}Record[PERIPHERAL]{}ComponentDesignator[LEDS]{}Memory_Depth[0x0020]{}Memory_UsageType[peripheral]{}ProgramDownloadAddress[0xFF000000]{}Memory_BusType[TSK3000:addr_bus]{}Memory_Mau[8]{}Memory_MatchedComponent[]{}Memory_Description[INTERCON_IO]{}Memory_FillBitPattern[]{}Memory_IncludeDependencies[False]{}Memory_ByLoadAddress[False]{}Memory_CopyDuringInit[False]{}Memory_NoCopyDuringInit[False]{}Memory_Interrupts[]{n}|Nexus_Core=Processor_OCDS|Nexus_JTAG_Device=True|Nexus_JTAG_Order=0|PCB3D= |ProgramLogicalTopAddress=0|Published=17-Nov-2004|Publisher=Altium Limited|Signal Integrity= |Simulation=
Record=Configuration|Name=NB3000XN_04|DeviceName=XC3S1400AN-4FG676C
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