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python-schdoc/tests/altium_crap/Tutorials/Audio Effects Tutorial/Audio_Effects.PrjFpgStructure

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Record=SheetSymbol|SourceDocument=Effects_Sch.SchDoc|Designator=U_Effects_OB|SchDesignator=U_Effects_OB|FileName=Effects_OB.OpenBus|SymbolType=Normal|RawFileName=Effects_OB.OpenBus|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol
Record=SubProject|ProjectPath=Embedded\Audio_Effects_Emb.PrjEmb
Record=TopLevelDocument|FileName=Effects_Sch.SchDoc
Record=NEXUS_CORE|ComponentDesignator=U3|BaseComponentDesignator=U3|DocumentName=Effects_Sch.SchDoc|LibraryReference=DIGITAL_IO|NexusDeviceId=DIGITAL_IO|SubProjectPath= |NEXUS_JTAG_INDEX=0|ComponentUniqueID=GRQBFPNB|Description=Configurable Digital IO|Comment=DIGITAL_IO|Component Kind=Standard|ComponentLink1Description=Core &Resource Usage|ComponentLink1URL=CR0134 FPGA Instrument Resource Usage.pdf|ConfigurationParameters={}Version[2.0]{}StorageType[3]{}InterfaceType[Parallel]{}SchCompWidth[140]{}Input0Name[AIN{1}7..0{2}]{}Input0Width[8]{}Input0InitValue[0]{}Input0Kind[Bar]{}Input0BarStyle[Red]{}Input1Name[BIN{1}7..0{2}]{}Input1Width[8]{}Input1InitValue[0]{}Input1Kind[LEDs]{}Input1LEDStyle[Red]{}Output0Name[AOUT{1}7..0{2}]{}Output0Width[8]{}Output0InitValue[0]{}Output0Kind[Slider]{}Output1Name[BOUT{1}7..0{2}]{}Output1Width[8]{}Output1InitValue[0]{}Output1Kind[LED Digits]{}Output1SegStyle[Red]{}Output1SegRadix[Binary]{}Designator[U3]{}InternalID[0]{}|ConfiguratorName=DIGITAL_IO|Core Revision=1.00.00|Footprint= |HelpURL=CR0179 DIGITAL_IO Configurable Digital IO Module.pdf|LastRevisionNo=1.00.00|Library Name=FPGA Instruments.IntLib|Library Reference=DIGITAL_IO|NEXUS_CORE=Instrument|NEXUS_JTAG_DEVICE=True|NEXUS_JTAG_ORDER=0|PCB3D= |Published=28-Jun-2007|Publisher=Altium Limited|Signal Integrity= |Simulation= |UseInDSF=True
Record=NEXUS_CORE|ComponentDesignator=MCU|BaseComponentDesignator=MCU|DocumentName=Effects_OB.OpenBus|LibraryReference=TSK3000A|NexusDeviceId=TSK3000A|SubProjectPath=Embedded\Audio_Effects_Emb.PrjEmb|NEXUS_JTAG_INDEX=1|ComponentUniqueID=KNQQCUFO|Description=OpenBus Component|ChildModel1=TSK3000A_MCU|ChildModel2=TSK3000A_MDU|ChildModel3=TSK3000A_OCDS|ChildModel4=TSK3000A_Shift_Barrel|ChildModel5=TSK3000A_Shift_Sequential|ChildModel6=Mult_32x32|ChildModel7=m33x33|Comment= |Component Kind=Standard|ComponentLink1Description=Core &Resource Usage|ComponentLink1URL=CR0140 FPGA Processor Resource Usage.pdf#page=22|ComponentLink2Description=Embedded &Tools Guide|ComponentLink2URL=GU0111 Using the TSK3000 Embedded Tools.pdf|ComponentLink3Description=Embedded T&echnical References|ComponentLink3URL=TR0109 TSK3000 Embedded Tools Reference.pdf|ConfigurationParameters={}Version[1.0]{}Option_Processor[0]{}Option_Memory[5]{}Option_MDU[0]{}Option_OCDS[0]{}Option_Shifter[0]{}Option_InterruptCount[32]{}Option_DebugWhenReset[0]{}|ConfiguratorName=FPGA_MCU32|ExportedInterrupts=0000000000000000,FFFFFFFF,FFFFFFFF|Footprint= |HelpURL=CR0121 TSK3000A 32 bit RISC Processor.pdf|LastRevisionNo=1.00.00|Library Name= |Library Reference=TSK3000A|Memory_Configuration=Record[AUTOIMPORT]{}AutoImport_Memory[True]{}AutoImport_Peripherals[True]{n}Record[CODE_EXPORT]{}ExportType[1]{n}Record[NEXUS_CORE]{}ComponentDesignator[MCU]{}Memory_Depth[32768]{}Memory_UsageType[nvram]{}Memory_Speed[1]{}ProgramDownloadAddress[0x0]{}Memory_BusType[TSK3000:addr_bus]{}Memory_Mau[8]{}Memory_MatchedComponent[]{}Memory_Description[]{}Memory_FillBitPattern[]{}Memory_IncludeDependencies[False]{}Memory_ByLoadAddress[False]{}Memory_CopyDuringInit[False]{}Memory_NoCopyDuringInit[False]{}Memory_Interrupts[]{n}Record[NEXUS_CORE]{}ComponentDesignator[SRAM]{}Memory_Depth[0x100000]{}Memory_UsageType[ram]{}Memory_Speed[1]{}ProgramDownloadAddress[0x1000000]{}Memory_BusType[TSK3000:addr_bus]{}Memory_Mau[8]{}Memory_MatchedComponent[]{}Memory_Description[INTERCON_MEM]{}Memory_FillBitPattern[]{}Memory_IncludeDependencies[False]{}Memory_ByLoadAddress[False]{}Memory_CopyDuringInit[False]{}Memory_NoCopyDuringInit[False]{}Memory_Interrupts[]{n}Record[PERIPHERAL]{}ComponentDesignator[AUDIO]{}Memory_Depth[0x0008]{}Memory_UsageType[peripheral]{}Memory_Speed[1]{}ProgramDownloadAddress[0xFF000000]{}Memory_BusType[TSK3000:addr_bus]{}Memory_Mau[8]{}Memory_MatchedComponent[]{}Memory_Description[INTERCON_IO]{}Memory_FillBitPattern[]{}Memory_IncludeDependencies[False]{}Memory_ByLoadAddress[False]{}Memory_CopyDuringInit[False]{}Memory_NoCopyDuringInit[False]{}Memory_Interrupts[1]{n}Record[PERIPHERAL]{}ComponentDesignator[GPIO]{}Memory_Depth[0x0002]{}Memory_UsageType[peripheral]{}Memory_Speed[1]{}ProgramDownloadAddress[0xFF030000]{}Memory_BusType[TSK3000:addr_bus]{}Memory_Mau[8]{}Memory_MatchedComponent[]{}Memory_Description[INTERCON_IO]{}Memory_FillBitPattern[]{}Memory_IncludeDependencies[False]{}Memory_ByLoadAddress[False]{}Memory_CopyDuringInit[False]{}Memory_NoCopyDuringInit[False]{}Memory_Interrupts[]{n}Record[PERIPHERAL]{}ComponentDesignator[SPI]{}Memory_Depth[0x0008]{}Memory_UsageType[peripheral]{}Memory_Speed[1]{}ProgramDownloadAddress[0xFF010000]{}Memory_BusType[TSK3000:addr_bus]{}Memory_Mau[8]{}Memory_MatchedComponent[]{}Memory_Description[INTERCON_IO]{}Memory_FillBitPattern[]{}Memory_IncludeDependencies[False]{}Memory_ByLoadAddress[False]{}Memory_CopyDuringInit[False]{}Memory_NoCopyDuringInit[False]{}Memory_Interrupts[]{n}Record[PERIPHERAL]{}ComponentDesignator[TERM]{}Memory_Depth[0x0010]{}Memory_UsageType[peripheral]{}Memory_Speed[1]{}ProgramDownloadAddress[0xFF020000]{}Memory_BusType[TSK3000:addr_bus]{}Memory_Mau[8]{}Memory_MatchedComponent[]{}Memory_Description[INTERCON_IO]{}Memory_FillBitPattern[]{}Memory_IncludeDependencies[False]{}Memory_ByLoadAddress[False]{}Memory_CopyDuringInit[False]{}Memory_NoCopyDuringInit[False]{}Memory_Interrupts[E3,E4]{n}Record[PHYSICAL_MEMORY]{}ComponentDesignator[MCU]{}Memory_Depth[32768]{}Memory_UsageType[nvram]{}Memory_Speed[1]{}ProgramDownloadAddress[0x0]{}Memory_BusType[TSK3000:addr_bus]{}Memory_Mau[8]{}Memory_MatchedComponent[]{}Memory_Description[]{}Memory_FillBitPattern[]{}Memory_IncludeDependencies[False]{}Memory_ByLoadAddress[False]{}Memory_CopyDuringInit[False]{}Memory_NoCopyDuringInit[False]{}Memory_Interrupts[]{n}Record[PHYSICAL_MEMORY]{}ComponentDesignator[SRAM]{}Memory_Depth[0x100000]{}Memory_UsageType[ram]{}Memory_Speed[1]{}ProgramDownloadAddress[0x1000000]{}Memory_BusType[TSK3000:addr_bus]{}Memory_Mau[8]{}Memory_MatchedComponent[]{}Memory_Description[INTERCON_MEM]{}Memory_FillBitPattern[]{}Memory_IncludeDependencies[False]{}Memory_ByLoadAddress[False]{}Memory_CopyDuringInit[False]{}Memory_NoCopyDuringInit[False]{}Memory_Interrupts[]{n}|Nexus_Core=Processor_OCDS|Nexus_JTAG_Device=True|Nexus_JTAG_Order=0|PCB3D= |ProgramLogicalTopAddress=0|Published=17-Nov-2004|Publisher=Altium Limited|Signal Integrity= |Simulation=
Record=NEXUS_CORE|ComponentDesignator=TERM|BaseComponentDesignator=TERM|DocumentName=Effects_OB.OpenBus|LibraryReference=TERMINAL|NexusDeviceId=TERMINAL|SubProjectPath= |NEXUS_JTAG_INDEX=2|ComponentUniqueID=TWDWUPFN|Description=OpenBus Component|Comment= |Component Kind=Standard|ComponentLink1Description=Core &Resource Usage|ComponentLink1URL=CR0134 FPGA Instrument Resource Usage.pdf|Footprint= |HelpURL= |LastRevisionNo=1.00.00|Library Name= |Library Reference=TERMINAL|NEXUS_CORE=Instrument|NEXUS_JTAG_DEVICE=True|NEXUS_JTAG_ORDER=0|PCB3D= |Published=03-Jul-2007|Publisher=Altium Limited|Signal Integrity= |Simulation= |UseInDSF=True
Record=NEXUS_CORE_COMPONENT|BaseComponentDesignator=MCU|DocumentName=Effects_OB.OpenBus|LibraryReference=TSK3000A|SubProjectPath=Embedded\Audio_Effects_Emb.PrjEmb|Configuration= |Description=OpenBus Component|NexusDeviceId=TSK3000A|SubPartUniqueId1=KNQQCUFO|SubPartDocPath1=Effects_OB.OpenBus|ChildModel1=TSK3000A_MCU|ChildModel2=TSK3000A_MDU|ChildModel3=TSK3000A_OCDS|ChildModel4=TSK3000A_Shift_Barrel|ChildModel5=TSK3000A_Shift_Sequential|ChildModel6=Mult_32x32|ChildModel7=m33x33|Comment=*|Component Kind=Standard|ComponentLink1Description=Core &Resource Usage|ComponentLink1URL=CR0140 FPGA Processor Resource Usage.pdf#page=22|ComponentLink2Description=Embedded &Tools Guide|ComponentLink2URL=GU0111 Using the TSK3000 Embedded Tools.pdf|ComponentLink3Description=Embedded T&echnical References|ComponentLink3URL=TR0109 TSK3000 Embedded Tools Reference.pdf|ConfigurationParameters={}Version[1.0]{}Option_Processor[0]{}Option_Memory[5]{}Option_MDU[0]{}Option_OCDS[0]{}Option_Shifter[0]{}Option_InterruptCount[32]{}Option_DebugWhenReset[0]{}|ConfiguratorName=FPGA_MCU32|ExportedInterrupts=0000000000000000,FFFFFFFF,FFFFFFFF|Footprint= |HelpURL=CR0121 TSK3000A 32 bit RISC Processor.pdf|LastRevisionNo=1.00.00|Library Name= |Library Reference=TSK3000A|Memory_Configuration=Record[AUTOIMPORT]{}AutoImport_Memory[True]{}AutoImport_Peripherals[True]{n}Record[CODE_EXPORT]{}ExportType[1]{n}Record[NEXUS_CORE]{}ComponentDesignator[MCU]{}Memory_Depth[32768]{}Memory_UsageType[nvram]{}Memory_Speed[1]{}ProgramDownloadAddress[0x0]{}Memory_BusType[TSK3000:addr_bus]{}Memory_Mau[8]{}Memory_MatchedComponent[]{}Memory_Description[]{}Memory_FillBitPattern[]{}Memory_IncludeDependencies[False]{}Memory_ByLoadAddress[False]{}Memory_CopyDuringInit[False]{}Memory_NoCopyDuringInit[False]{}Memory_Interrupts[]{n}Record[NEXUS_CORE]{}ComponentDesignator[SRAM]{}Memory_Depth[0x100000]{}Memory_UsageType[ram]{}Memory_Speed[1]{}ProgramDownloadAddress[0x1000000]{}Memory_BusType[TSK3000:addr_bus]{}Memory_Mau[8]{}Memory_MatchedComponent[]{}Memory_Description[INTERCON_MEM]{}Memory_FillBitPattern[]{}Memory_IncludeDependencies[False]{}Memory_ByLoadAddress[False]{}Memory_CopyDuringInit[False]{}Memory_NoCopyDuringInit[False]{}Memory_Interrupts[]{n}Record[PERIPHERAL]{}ComponentDesignator[AUDIO]{}Memory_Depth[0x0008]{}Memory_UsageType[peripheral]{}Memory_Speed[1]{}ProgramDownloadAddress[0xFF000000]{}Memory_BusType[TSK3000:addr_bus]{}Memory_Mau[8]{}Memory_MatchedComponent[]{}Memory_Description[INTERCON_IO]{}Memory_FillBitPattern[]{}Memory_IncludeDependencies[False]{}Memory_ByLoadAddress[False]{}Memory_CopyDuringInit[False]{}Memory_NoCopyDuringInit[False]{}Memory_Interrupts[1]{n}Record[PERIPHERAL]{}ComponentDesignator[GPIO]{}Memory_Depth[0x0002]{}Memory_UsageType[peripheral]{}Memory_Speed[1]{}ProgramDownloadAddress[0xFF030000]{}Memory_BusType[TSK3000:addr_bus]{}Memory_Mau[8]{}Memory_MatchedComponent[]{}Memory_Description[INTERCON_IO]{}Memory_FillBitPattern[]{}Memory_IncludeDependencies[False]{}Memory_ByLoadAddress[False]{}Memory_CopyDuringInit[False]{}Memory_NoCopyDuringInit[False]{}Memory_Interrupts[]{n}Record[PERIPHERAL]{}ComponentDesignator[SPI]{}Memory_Depth[0x0008]{}Memory_UsageType[peripheral]{}Memory_Speed[1]{}ProgramDownloadAddress[0xFF010000]{}Memory_BusType[TSK3000:addr_bus]{}Memory_Mau[8]{}Memory_MatchedComponent[]{}Memory_Description[INTERCON_IO]{}Memory_FillBitPattern[]{}Memory_IncludeDependencies[False]{}Memory_ByLoadAddress[False]{}Memory_CopyDuringInit[False]{}Memory_NoCopyDuringInit[False]{}Memory_Interrupts[]{n}Record[PERIPHERAL]{}ComponentDesignator[TERM]{}Memory_Depth[0x0010]{}Memory_UsageType[peripheral]{}Memory_Speed[1]{}ProgramDownloadAddress[0xFF020000]{}Memory_BusType[TSK3000:addr_bus]{}Memory_Mau[8]{}Memory_MatchedComponent[]{}Memory_Description[INTERCON_IO]{}Memory_FillBitPattern[]{}Memory_IncludeDependencies[False]{}Memory_ByLoadAddress[False]{}Memory_CopyDuringInit[False]{}Memory_NoCopyDuringInit[False]{}Memory_Interrupts[E3,E4]{n}Record[PHYSICAL_MEMORY]{}ComponentDesignator[MCU]{}Memory_Depth[32768]{}Memory_UsageType[nvram]{}Memory_Speed[1]{}ProgramDownloadAddress[0x0]{}Memory_BusType[TSK3000:addr_bus]{}Memory_Mau[8]{}Memory_MatchedComponent[]{}Memory_Description[]{}Memory_FillBitPattern[]{}Memory_IncludeDependencies[False]{}Memory_ByLoadAddress[False]{}Memory_CopyDuringInit[False]{}Memory_NoCopyDuringInit[False]{}Memory_Interrupts[]{n}Record[PHYSICAL_MEMORY]{}ComponentDesignator[SRAM]{}Memory_Depth[0x100000]{}Memory_UsageType[ram]{}Memory_Speed[1]{}ProgramDownloadAddress[0x1000000]{}Memory_BusType[TSK3000:addr_bus]{}Memory_Mau[8]{}Memory_MatchedComponent[]{}Memory_Description[INTERCON_MEM]{}Memory_FillBitPattern[]{}Memory_IncludeDependencies[False]{}Memory_ByLoadAddress[False]{}Memory_CopyDuringInit[False]{}Memory_NoCopyDuringInit[False]{}Memory_Interrupts[]{n}|Nexus_Core=Processor_OCDS|Nexus_JTAG_Device=True|Nexus_JTAG_Order=0|PCB3D= |ProgramLogicalTopAddress=0|Published=17-Nov-2004|Publisher=Altium Limited|Signal Integrity= |Simulation=
Record=NEXUS_CORE_COMPONENT|BaseComponentDesignator=TERM|DocumentName=Effects_OB.OpenBus|LibraryReference=TERMINAL|SubProjectPath= |Configuration= |Description=OpenBus Component|NexusDeviceId=TERMINAL|SubPartUniqueId1=TWDWUPFN|SubPartDocPath1=Effects_OB.OpenBus|Comment=*|Component Kind=Standard|ComponentLink1Description=Core &Resource Usage|ComponentLink1URL=CR0134 FPGA Instrument Resource Usage.pdf|Footprint= |HelpURL= |LastRevisionNo=1.00.00|Library Name= |Library Reference=TERMINAL|NEXUS_CORE=Instrument|NEXUS_JTAG_DEVICE=True|NEXUS_JTAG_ORDER=0|PCB3D= |Published=03-Jul-2007|Publisher=Altium Limited|Signal Integrity= |Simulation= |UseInDSF=True
Record=NEXUS_CORE_COMPONENT|BaseComponentDesignator=U3|DocumentName=Effects_Sch.SchDoc|LibraryReference=DIGITAL_IO|SubProjectPath= |Configuration= |Description=Configurable Digital IO|NexusDeviceId=DIGITAL_IO|SubPartUniqueId1=GRQBFPNB|SubPartDocPath1=Effects_Sch.SchDoc|Comment=DIGITAL_IO|Component Kind=Standard|ComponentLink1Description=Core &Resource Usage|ComponentLink1URL=CR0134 FPGA Instrument Resource Usage.pdf|ConfigurationParameters={}Version[2.0]{}StorageType[3]{}InterfaceType[Parallel]{}SchCompWidth[140]{}Input0Name[AIN{1}7..0{2}]{}Input0Width[8]{}Input0InitValue[0]{}Input0Kind[Bar]{}Input0BarStyle[Red]{}Input1Name[BIN{1}7..0{2}]{}Input1Width[8]{}Input1InitValue[0]{}Input1Kind[LEDs]{}Input1LEDStyle[Red]{}Output0Name[AOUT{1}7..0{2}]{}Output0Width[8]{}Output0InitValue[0]{}Output0Kind[Slider]{}Output1Name[BOUT{1}7..0{2}]{}Output1Width[8]{}Output1InitValue[0]{}Output1Kind[LED Digits]{}Output1SegStyle[Red]{}Output1SegRadix[Binary]{}Designator[U3]{}InternalID[0]{}|ConfiguratorName=DIGITAL_IO|Core Revision=1.00.00|Footprint= |HelpURL=CR0179 DIGITAL_IO Configurable Digital IO Module.pdf|LastRevisionNo=1.00.00|Library Name=FPGA Instruments.IntLib|Library Reference=DIGITAL_IO|NEXUS_CORE=Instrument|NEXUS_JTAG_DEVICE=True|NEXUS_JTAG_ORDER=0|PCB3D= |Published=28-Jun-2007|Publisher=Altium Limited|Signal Integrity= |Simulation= |UseInDSF=True
Record=Configuration|Name=NB2DSK01_08_DB30_06|DeviceName=XC3S1500-4FG676C
Record=Configuration|Name=NB2DSK01_08_DB31_06|DeviceName=EP2C35F672C8
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