python-schdoc/tests/altium_crap/Circuit Sim/Common-Base Amplifier/Out/Common-Base Amplifier.nsx

31 lines
784 B
Plaintext

Common-Base Amplifier
*SPICE Netlist generated by Advanced Sim server on 11/06/2002 5:16:57 PM
*Schematic Netlist:
C1 IN E 1uF
C2 C OUT 1uF
Q1 C 0 E 2N3904
R1 E NetR1_2 4.7k
R2 C NetR2_2 4.7k
R3 OUT 0 10k
V1 0 NetR1_2 5V
V2 NetR2_2 0 12V
V3 IN 0 DC 0V SIN(0 1mV 1k 0 0) AC 1V 0V
.SAVE 0 C E IN NetR1_2 NetR2_2 OUT V1#branch V2#branch V3#branch @V1[z] @V2[z]
.SAVE @V3[z] @C1[i] @C2[i] @Q1[ib] @Q1[ic] @Q1[ie] @R1[i] @R2[i] @R3[i] @C1[p] @C2[p]
.SAVE @Q1[p] @R1[p] @R2[p] @R3[p] @V1[p] @V2[p] @V3[p]
*PLOT TRAN -1 1 A=IN A=OUT
*PLOT OP -1 1 A=IN A=OUT
*Selected Circuit Analyses:
.TRAN 1E-5 0.003 0 1E-5
.OP
*Models and Subcircuit:
.MODEL 2N3904 NPN(IS=1.4E-14 BF=300 VAF=100 IKF=0.025 ISE=3E-13 BR=7.5 RC=2.4
+ CJE=4.5E-12 TF=4E-10 CJC=3.5E-12 TR=2.1E-8 XTB=1.5 KF=9E-16 )
.END