476 lines
19 KiB
C
476 lines
19 KiB
C
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#include "dma.h"
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/********************************************************************************
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* @file dma.c
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* @author <EFBFBD>̳ϿƼ<EFBFBD> Mr.Wang
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* @version V1.1.0
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* @date 26-Dec-2018
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* @brief <EFBFBD>ṩDMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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******************************************************************************
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* DMA1<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD><EFBFBD>һ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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USART1_TX ͨ<EFBFBD><EFBFBD>4
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USART1_RX ͨ<EFBFBD><EFBFBD>5
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USART2_TX ͨ<EFBFBD><EFBFBD>7
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USART2_RX ͨ<EFBFBD><EFBFBD>6
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USART3_TX ͨ<EFBFBD><EFBFBD>2
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USART3_RX ͨ<EFBFBD><EFBFBD>3
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* DMA2<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD><EFBFBD>һ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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UART4_TX ͨ<EFBFBD><EFBFBD>5
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UART4_RX ͨ<EFBFBD><EFBFBD>3
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1<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>1DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD>TX<EFBFBD><EFBFBD><EFBFBD><EFBFBD>DMA1<EFBFBD><EFBFBD>ͨ<EFBFBD><EFBFBD>4 <EFBFBD><EFBFBD>
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1<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>DMA1ʱ<EFBFBD>ӣ<EFBFBD>RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE) <EFBFBD><EFBFBD>
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2<EFBFBD><EFBFBD>DMA_Init<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ȳ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ٻ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڲ<EFBFBD>RAM<EFBFBD><EFBFBD>ַ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ҪTX<EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȷ<EFBFBD><EFBFBD>RAM<EFBFBD><EFBFBD>ַ<EFBFBD>ͷ<EFBFBD><EFBFBD>ͻ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>С<EFBFBD><EFBFBD>
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3<EFBFBD><EFBFBD>DMA_ITConfig<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
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4<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD><EFBFBD><EFBFBD>״̬<EFBFBD><EFBFBD><EFBFBD>жϣ<EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD>NVIC_Init<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȼ<EFBFBD> <EFBFBD><EFBFBD>
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5<EFBFBD><EFBFBD>USART_DMACmd(USART1,USART_DMAReq_Tx,ENABLE); //ʹ<>ܴ<EFBFBD><DCB4><EFBFBD>1<EFBFBD><31>DMA<4D><41><EFBFBD><EFBFBD>
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6<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>DMA_TxEnable<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ٷ<EFBFBD><EFBFBD>ͻ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʵ<EFBFBD>ִ<EFBFBD><EFBFBD><EFBFBD>1<EFBFBD><EFBFBD><EFBFBD><EFBFBD>TX<EFBFBD><EFBFBD>ͬʱDMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɻ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>DMA TC<EFBFBD>жϡ<EFBFBD>
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2<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>1DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD>RX<EFBFBD><EFBFBD><EFBFBD><EFBFBD>DMA1<EFBFBD><EFBFBD>ͨ<EFBFBD><EFBFBD>5 <EFBFBD><EFBFBD>
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1<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>DMA1ʱ<EFBFBD>ӣ<EFBFBD>RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE) <EFBFBD><EFBFBD>
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2<EFBFBD><EFBFBD>DMA_Init<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>ȿ<EFBFBD><EFBFBD>ٴ<EFBFBD><EFBFBD><EFBFBD>1DMA<EFBFBD><EFBFBD><EFBFBD>ջ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>趨<EFBFBD><EFBFBD><EFBFBD><EFBFBD>1DMA<EFBFBD><EFBFBD><EFBFBD>ջ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>С<EFBFBD><EFBFBD>
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3<EFBFBD><EFBFBD>DMA_ITConfig<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
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4<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ؽ<EFBFBD><EFBFBD><EFBFBD>״̬<EFBFBD><EFBFBD><EFBFBD>жϣ<EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD>NVIC_Init<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȼ<EFBFBD> <EFBFBD><EFBFBD>
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5<EFBFBD><EFBFBD>USART_DMACmd(USART1,USART_DMAReq_Rx,ENABLE); //ʹ<>ܴ<EFBFBD><DCB4><EFBFBD>1<EFBFBD><31>DMA<4D><41><EFBFBD><EFBFBD>
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6<EFBFBD><EFBFBD>DMA_RX_Enable(DMA1_Channel5, (u32)&ReceBuff, RECE_BUF_SIZE ) ;
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*******************************************************************************/
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DMA_Channel_TypeDef* dmaChx[DMA_CHSUM] = {DMA1_Channel1, DMA1_Channel2, DMA1_Channel3, DMA1_Channel4, DMA1_Channel5,
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DMA1_Channel6, DMA1_Channel7, DMA2_Channel1, DMA2_Channel2, DMA2_Channel3,
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DMA2_Channel4, DMA2_Channel5} ; //DMA1<41><31>DMA2<41><32><EFBFBD><EFBFBD>12<31><32>ͨ<EFBFBD><CDA8>
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const uint32_t dmaIRQChx[DMA_CHSUM] = {DMA1_Channel1_IRQn, DMA1_Channel2_IRQn, DMA1_Channel3_IRQn, DMA1_Channel4_IRQn,
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DMA1_Channel5_IRQn, DMA1_Channel6_IRQn, DMA1_Channel7_IRQn, DMA2_Channel1_IRQn,
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DMA2_Channel2_IRQn, DMA2_Channel3_IRQn, DMA2_Channel4_5_IRQn, DMA2_Channel4_5_IRQn} ; //DMA1<41><31>DMA2<41><32><EFBFBD><EFBFBD>12<31><32>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD>global Interrupt
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/*DMA<4D>жϻص<CFBB><D8B5><EFBFBD><EFBFBD>ز<EFBFBD><D8B2><EFBFBD>*/
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DMAFP dmaTcFp[DMA_CHSUM] = {NULL} ; //DMA1_CH1~DMA1_CH7\ DMA2_CH1~DMA2_CH5 <20><><EFBFBD><EFBFBD>12<31><32>DMAͨ<41><CDA8><EFBFBD><EFBFBD>TC<54>жϣ<D0B6><CFA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɣ<EFBFBD><C9A3><EFBFBD><EFBFBD>Ļص<C4BB><D8B5><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
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DMAFP dmaTeFp[DMA_CHSUM] = {NULL} ; //DMA1_CH1~DMA1_CH7\ DMA2_CH1~DMA2_CH5 <20><><EFBFBD><EFBFBD>12<31><32>DMAͨ<41><CDA8><EFBFBD><EFBFBD>TE<54>жϣ<D0B6><CFA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><F3A3A9A1>Ļص<C4BB><D8B5><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
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/**************************************************************************************************
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* <EFBFBD><EFBFBD> <EFBFBD>ƣ<EFBFBD>DMAFP Dma_RegHookCallback(DMACH_e DMA_CHx, DMAIRQTYPE_e eIrqType, DMAFP pCallback)
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD><EFBFBD><EFBFBD>DMA<EFBFBD>ж<EFBFBD>(TC\TE\HT)<EFBFBD>ص<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>-ע<EFBFBD>ắ<EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD>ݲ<EFBFBD><EFBFBD><EFBFBD>eIrqType<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ע<EFBFBD><EFBFBD><EFBFBD>Ļص<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>TC\TE<EFBFBD>жϻص<EFBFBD><EFBFBD><EFBFBD>
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* <EFBFBD><EFBFBD><EFBFBD>ڲ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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* @param1 eIrqType DMAIRQTYPE_eö<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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* @param2 pCallback DMAFP<EFBFBD><EFBFBD><EFBFBD>ͺ<EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><EFBFBD>
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* @param3 DMA_CHx DMACH_eö<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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* <EFBFBD><EFBFBD><EFBFBD>ڲ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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* @param1 pCallback DMAFP<EFBFBD><EFBFBD><EFBFBD>ͺ<EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><EFBFBD>
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* <EFBFBD><EFBFBD><EFBFBD>÷<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ⲿ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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*************************************************************************************************/
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DMAFP Dma_RegHookCallback(DMACH_e DMA_CHx, DMAIRQTYPE_e eIrqType, DMAFP pCallback)
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{
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if( DMATC == eIrqType)
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{
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if( dmaTcFp[DMA_CHx] == NULL )
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dmaTcFp[DMA_CHx] = pCallback ;
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else
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SysErr("DmaTc Callback repeat reg!") ;
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}
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else if( DMATE == eIrqType)
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{
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if( dmaTeFp[DMA_CHx] == NULL )
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dmaTeFp[DMA_CHx] = pCallback ;
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else
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SysErr("DmaTe Callback repeat reg!") ;
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}
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else
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{
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SysErr("DmaTe Callback \"eIrqType\" error!") ;
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}
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return pCallback ;
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}
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/**************************************************************************************************
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* <EFBFBD><EFBFBD> <EFBFBD>ƣ<EFBFBD>void Io_Hook(uint32_t DMAy_FLAG)
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD><EFBFBD><EFBFBD>DMA<EFBFBD>ж<EFBFBD><EFBFBD>ڵ<EFBFBD><EFBFBD>õĹ<EFBFBD><EFBFBD>Ӻ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD>е<EFBFBD><EFBFBD>жϻ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ӧ<EFBFBD>Ļص<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><EFBFBD>ٺٺ١<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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* <EFBFBD><EFBFBD>Ȼ<EFBFBD><EFBFBD>ͬ<EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>DMAy_FLAG<EFBFBD>Ṵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͬ<EFBFBD>Ļص<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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* <EFBFBD><EFBFBD><EFBFBD>ڲ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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* @param1 DMAy_FLAG <EFBFBD>жϱ<EFBFBD>־<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ĸ<EFBFBD>DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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*************************************************************************************************/
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void Dma_Hook(uint32_t DMAy_FLAG)
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{
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switch(DMAy_FLAG)
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{
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case DMA1_FLAG_TC1: if( dmaTcFp[0] != NULL) dmaTcFp[0](); break ;
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case DMA1_FLAG_TE1: if( dmaTeFp[0] != NULL) dmaTeFp[0](); break ;
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case DMA1_FLAG_TC2: if( dmaTcFp[1] != NULL) dmaTcFp[1](); break ;
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case DMA1_FLAG_TE2: if( dmaTeFp[1] != NULL) dmaTeFp[1](); break ;
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case DMA1_FLAG_TC3: if( dmaTcFp[2] != NULL) dmaTcFp[2](); break ;
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case DMA1_FLAG_TE3: if( dmaTeFp[2] != NULL) dmaTeFp[2](); break ;
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case DMA1_FLAG_TC4: if( dmaTcFp[3] != NULL) dmaTcFp[3](); break ;
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case DMA1_FLAG_TE4: if( dmaTeFp[3] != NULL) dmaTeFp[3](); break ;
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case DMA1_FLAG_TC5: if( dmaTcFp[4] != NULL) dmaTcFp[4](); break ;
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case DMA1_FLAG_TE5: if( dmaTeFp[4] != NULL) dmaTeFp[4](); break ;
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case DMA1_FLAG_TC6: if( dmaTcFp[5] != NULL) dmaTcFp[5](); break ;
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case DMA1_FLAG_TE6: if( dmaTeFp[5] != NULL) dmaTeFp[5](); break ;
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case DMA1_FLAG_TC7: if( dmaTcFp[6] != NULL) dmaTcFp[6](); break ;
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case DMA1_FLAG_TE7: if( dmaTeFp[6] != NULL) dmaTeFp[6](); break ;
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case DMA2_FLAG_TC1: if( dmaTcFp[7] != NULL) dmaTcFp[7](); break ;
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case DMA2_FLAG_TE1: if( dmaTeFp[7] != NULL) dmaTeFp[7](); break ;
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case DMA2_FLAG_TC2: if( dmaTcFp[8] != NULL) dmaTcFp[8](); break ;
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case DMA2_FLAG_TE2: if( dmaTeFp[8] != NULL) dmaTeFp[8](); break ;
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case DMA2_FLAG_TC3: if( dmaTcFp[9] != NULL) dmaTcFp[9](); break ;
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case DMA2_FLAG_TE3: if( dmaTeFp[9] != NULL) dmaTeFp[9](); break ;
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case DMA2_FLAG_TC4: if( dmaTcFp[10] != NULL) dmaTcFp[10](); break ;
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case DMA2_FLAG_TE4: if( dmaTeFp[10] != NULL) dmaTeFp[10](); break ;
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case DMA2_FLAG_TC5: if( dmaTcFp[11] != NULL) dmaTcFp[11](); break ;
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case DMA2_FLAG_TE5: if( dmaTeFp[11] != NULL) dmaTeFp[11](); break ;
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default: break ;
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}
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}
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/**************************************************************************************************
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* <EFBFBD><EFBFBD> <EFBFBD>ƣ<EFBFBD> void DMA_Config(DMACH_e DMA_CHx, u32 periAddr, u32 memAddr, DMADIR_e tranDire, DMAMODE_e CircMode, IntPriority_e ePriority)
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* ˵ <EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD>ʼ<EFBFBD><EFBFBD>DMA<EFBFBD><EFBFBD><EFBFBD>ز<EFBFBD><EFBFBD><EFBFBD>
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* <EFBFBD><EFBFBD><EFBFBD>ڲ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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* @param1 DMA_CHx: ѡ<EFBFBD><EFBFBD>DMAͨ<EFBFBD><EFBFBD>
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* This parameter can be one of the following values:
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* DMA1_Channel1, DMA1_Channel2...DMA1_Channel7 or , DMA2_Channel1...DMA2_Channel5.
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*
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* @param2 periAddr: <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
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* This parameter can be any combination of the following values:
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* @arg (u32)&USART1->DR
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*
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* @param3 memAddr: RAM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַBUFF
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* This parameter can be: (u32)SendBuff or (uint32_t)&TEXT_TO_SEND.
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*
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* @param4 tranDire: <EFBFBD><EFBFBD><EFBFBD>䷽<EFBFBD><EFBFBD>
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* This parameter can be any combination of the following values:
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* @arg DMA_DIR_PeripheralDST // TX
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* @arg DMA_DIR_PeripheralSRC // RX
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*
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* @param5 mode: ѭ<EFBFBD><EFBFBD>ģʽBUFF<EFBFBD>Ƿ<EFBFBD>ѭ<EFBFBD><EFBFBD>
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* This parameter can be any combination of the following values:
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* @arg DMA_Mode_Normal //<2F><>ѭ<EFBFBD><D1AD>
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* @arg DMA_Mode_Circular //ѭ<><D1AD>ģʽ
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* @arg DISABLE
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* @param6 ePriority: IntPriority_eö<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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* <EFBFBD><EFBFBD><EFBFBD>ڲ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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* ˵ <EFBFBD><EFBFBD><EFBFBD><EFBFBD> DMA_Config(DMA1_Channel4,(u32)&USART1->DR,(u32)SendBuff, DMA_DIR_PeripheralDST, DMA_Mode_Normal<EFBFBD><EFBFBD>INT_RANK_12);
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* <EFBFBD><EFBFBD><EFBFBD>÷<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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************************************************************************************************************/
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void DMA_Config(DMACH_e DMA_CHx, u32 periAddr, u32 memAddr, DMADIR_e tranDire, DMAMODE_e CircMode, IntPriority_e ePriority) //<2F>Ȳ<EFBFBD><C8B2><EFBFBD><EFBFBD><EFBFBD>DMA<4D><41><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʡ<EFBFBD>ڴ<EFBFBD>
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{
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DMA_InitTypeDef DMA_InitStructure;
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if( DMA_CHx < 7 ) //DMA1<41><31>ͨ<EFBFBD><CDA8>1~7<><37> DMA2<41><32>ͨ<EFBFBD><CDA8>1~5 <20><><EFBFBD><EFBFBD>12<31><32>DMAͨ<41><CDA8>
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RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE); //ʹ<><CAB9>DMA1<41><31><EFBFBD>䡢
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else
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RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA2, ENABLE); //ʹ<><CAB9>DMA2<41><32><EFBFBD>䡢
|
|||
|
DMA_DeInit(dmaChx[DMA_CHx]); //<2F><>DMA<4D><41>ͨ<EFBFBD><CDA8>1<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊȱʡֵ
|
|||
|
DMA_InitStructure.DMA_PeripheralBaseAddr = periAddr; //DMA<4D><41><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
|||
|
DMA_InitStructure.DMA_MemoryBaseAddr = memAddr; //DMA<4D>ڴ<EFBFBD><DAB4><EFBFBD><EFBFBD><EFBFBD>ַ
|
|||
|
DMA_InitStructure.DMA_DIR = tranDire; //<2F><><EFBFBD>ݴ<EFBFBD><DDB4>䷽<EFBFBD><EFBFBD><F2A3ACB4>ڴ<EFBFBD><DAB4><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>͵<EFBFBD><CDB5><EFBFBD><EFBFBD><EFBFBD> DMA_DIR_PeripheralDST
|
|||
|
DMA_InitStructure.DMA_BufferSize = 0; //DMAͨ<41><CDA8><EFBFBD><EFBFBD>DMA<4D><41><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD>С
|
|||
|
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; //<2F>ڴ<EFBFBD><DAB4><EFBFBD>ַ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; //<2F><><EFBFBD>ݿ<EFBFBD><DDBF><EFBFBD>Ϊ8λ
|
|||
|
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; //<2F><><EFBFBD>ݿ<EFBFBD><DDBF><EFBFBD>Ϊ8λ
|
|||
|
DMA_InitStructure.DMA_Mode = CircMode ; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ DMA_Mode_Normal
|
|||
|
DMA_InitStructure.DMA_Priority = DMA_Priority_Medium; //DMAͨ<41><CDA8> xӵ<78><D3B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȼ<EFBFBD>
|
|||
|
DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; //DMAͨ<41><CDA8>xû<78><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD>ڴ浽<DAB4>ڴ洫<DAB4><E6B4AB>
|
|||
|
DMA_Init(dmaChx[DMA_CHx], &DMA_InitStructure); //<2F><><EFBFBD><EFBFBD>DMA_InitStruct<63><74>ָ<EFBFBD><D6B8><EFBFBD>IJ<EFBFBD><C4B2><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>DMA<4D><41>ͨ<EFBFBD><CDA8>USART1_Tx_DMA_Channel<65><6C><EFBFBD><EFBFBD>ʶ<EFBFBD>ļĴ<C4BC><C4B4><EFBFBD>
|
|||
|
|
|||
|
NVIC_InitTypeDef NVIC_InitStructure;
|
|||
|
NVIC_InitStructure.NVIC_IRQChannel = dmaIRQChx[DMA_CHx] ;
|
|||
|
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = ePriority ; //<2F><>ռ<EFBFBD><D5BC><EFBFBD>ȼ<EFBFBD><C8BC><EFBFBD>
|
|||
|
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0 ; //<2F><><EFBFBD><EFBFBD><EFBFBD>ȼ<EFBFBD>
|
|||
|
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
|
|||
|
NVIC_Init(&NVIC_InitStructure);
|
|||
|
|
|||
|
DMA_ITConfig( dmaChx[DMA_CHx], DMA_IT_TC, ENABLE ) ; //ʹ<><CAB9>DMA<4D>ж<EFBFBD>ͨ<EFBFBD><CDA8>
|
|||
|
}
|
|||
|
|
|||
|
/****************************************************************************
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD>ƣ<EFBFBD>DMA1_Channel4_IRQHandler
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: DMA1_Channel4<EFBFBD>жϴ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
* ע <EFBFBD>⣺<EFBFBD><EFBFBD>DMA_CNDTRx = 0 ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ӧ<EFBFBD>жϡ<EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>TXΪ<EFBFBD>䳤DMA<EFBFBD><EFBFBD><EFBFBD>ȣ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɾͻ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>TC<EFBFBD>жϡ<EFBFBD><EFBFBD><EFBFBD>RXΪ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ե<EFBFBD>DMA_CNDTRx<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѭ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>0<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ջ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
|||
|
****************************************************************************/
|
|||
|
void DMA1_Channel1_IRQHandler(void)
|
|||
|
{
|
|||
|
if( DMA_GetFlagStatus( DMA1_FLAG_TC1 ) == SET ) //<2F>ж<EFBFBD><D0B6>Ƿ<EFBFBD>ΪDMA TC(<28><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>)<29>ж<EFBFBD>
|
|||
|
{
|
|||
|
DMA_ClearITPendingBit( DMA1_FLAG_TC1 ); //<2F><><EFBFBD>жϱ<D0B6>־λ
|
|||
|
SysLog("DMA1_TC1!") ;
|
|||
|
Dma_Hook(DMA1_FLAG_TC1) ; //<2F><><EFBFBD>й<EFBFBD><D0B9>Ӻ<EFBFBD><D3BA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
}
|
|||
|
if( DMA_GetFlagStatus( DMA1_FLAG_TE1 ) == SET ) //<2F>ж<EFBFBD><D0B6>Ƿ<EFBFBD>ΪDMA TE(<28><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>)<29>ж<EFBFBD>
|
|||
|
{
|
|||
|
DMA_ClearITPendingBit( DMA1_FLAG_TE1 ); //<2F><><EFBFBD>жϱ<D0B6>־λ
|
|||
|
SysErr("DMA1_TE1!") ;
|
|||
|
Dma_Hook(DMA1_FLAG_TE1) ; //<2F><><EFBFBD>й<EFBFBD><D0B9>Ӻ<EFBFBD><D3BA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
}
|
|||
|
}
|
|||
|
|
|||
|
/****************************************************************************
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD>ƣ<EFBFBD>DMA1_Channel4_IRQHandler
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: DMA1_Channel4<EFBFBD>жϴ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
* ע <EFBFBD>⣺<EFBFBD><EFBFBD>DMA_CNDTRx = 0 ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ӧ<EFBFBD>жϡ<EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>TXΪ<EFBFBD>䳤DMA<EFBFBD><EFBFBD><EFBFBD>ȣ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɾͻ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>TC<EFBFBD>жϡ<EFBFBD><EFBFBD><EFBFBD>RXΪ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ե<EFBFBD>DMA_CNDTRx<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѭ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>0<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ջ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
|||
|
****************************************************************************/
|
|||
|
void DMA1_Channel2_IRQHandler(void)
|
|||
|
{
|
|||
|
if( DMA_GetFlagStatus( DMA1_FLAG_TC2 ) == SET )
|
|||
|
{
|
|||
|
DMA_ClearITPendingBit( DMA1_FLAG_TC2 );
|
|||
|
SysLog("DMA1_TC2!") ;
|
|||
|
Dma_Hook(DMA1_FLAG_TC2) ;
|
|||
|
}
|
|||
|
if( DMA_GetFlagStatus( DMA1_FLAG_TE2 ) == SET )
|
|||
|
{
|
|||
|
DMA_ClearITPendingBit( DMA1_FLAG_TE2 );
|
|||
|
SysErr("DMA1_TE2!") ;
|
|||
|
Dma_Hook(DMA1_FLAG_TE2) ;
|
|||
|
}
|
|||
|
}
|
|||
|
|
|||
|
/****************************************************************************
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD>ƣ<EFBFBD>DMA1_Channel4_IRQHandler
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: DMA1_Channel4<EFBFBD>жϴ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
* ע <EFBFBD>⣺<EFBFBD><EFBFBD>DMA_CNDTRx = 0 ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ӧ<EFBFBD>жϡ<EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>TXΪ<EFBFBD>䳤DMA<EFBFBD><EFBFBD><EFBFBD>ȣ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɾͻ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>TC<EFBFBD>жϡ<EFBFBD><EFBFBD><EFBFBD>RXΪ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ե<EFBFBD>DMA_CNDTRx<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѭ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>0<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ջ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
|||
|
****************************************************************************/
|
|||
|
void DMA1_Channel3_IRQHandler(void)
|
|||
|
{
|
|||
|
if( DMA_GetFlagStatus( DMA1_FLAG_TC3 ) == SET )
|
|||
|
{
|
|||
|
DMA_ClearITPendingBit( DMA1_FLAG_TC3 );
|
|||
|
SysLog("DMA1_TC3!") ;
|
|||
|
Dma_Hook(DMA1_FLAG_TC3) ;
|
|||
|
}
|
|||
|
if( DMA_GetFlagStatus( DMA1_FLAG_TE3 ) == SET )
|
|||
|
{
|
|||
|
DMA_ClearITPendingBit( DMA1_FLAG_TE3 );
|
|||
|
SysErr("DMA1_TE3!") ;
|
|||
|
Dma_Hook(DMA1_FLAG_TE3) ;
|
|||
|
}
|
|||
|
}
|
|||
|
|
|||
|
/****************************************************************************
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD>ƣ<EFBFBD>DMA1_Channel4_IRQHandler
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: DMA1_Channel4<EFBFBD>жϴ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
* ע <EFBFBD>⣺<EFBFBD><EFBFBD>DMA_CNDTRx = 0 ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ӧ<EFBFBD>жϡ<EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>TXΪ<EFBFBD>䳤DMA<EFBFBD><EFBFBD><EFBFBD>ȣ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɾͻ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>TC<EFBFBD>жϡ<EFBFBD><EFBFBD><EFBFBD>RXΪ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ե<EFBFBD>DMA_CNDTRx<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѭ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>0<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ջ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
|||
|
****************************************************************************/
|
|||
|
void DMA1_Channel4_IRQHandler(void)
|
|||
|
{
|
|||
|
if( DMA_GetFlagStatus( DMA1_FLAG_TC4 ) == SET )
|
|||
|
{
|
|||
|
DMA_ClearITPendingBit( DMA1_FLAG_TC4 );
|
|||
|
SysLog("DMA1_TC4!") ;
|
|||
|
Dma_Hook(DMA1_FLAG_TC4) ;
|
|||
|
}
|
|||
|
if( DMA_GetFlagStatus( DMA1_FLAG_TE4 ) == SET )
|
|||
|
{
|
|||
|
DMA_ClearITPendingBit( DMA1_FLAG_TE4 );
|
|||
|
SysErr("DMA1_TE4!") ;
|
|||
|
Dma_Hook(DMA1_FLAG_TE4) ;
|
|||
|
}
|
|||
|
}
|
|||
|
|
|||
|
/****************************************************************************
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD>ƣ<EFBFBD>DMA1_Channel4_IRQHandler
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: DMA1_Channel4<EFBFBD>жϴ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
* ע <EFBFBD>⣺<EFBFBD><EFBFBD>DMA_CNDTRx = 0 ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ӧ<EFBFBD>жϡ<EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>TXΪ<EFBFBD>䳤DMA<EFBFBD><EFBFBD><EFBFBD>ȣ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɾͻ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>TC<EFBFBD>жϡ<EFBFBD><EFBFBD><EFBFBD>RXΪ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ե<EFBFBD>DMA_CNDTRx<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѭ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>0<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ջ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
|||
|
****************************************************************************/
|
|||
|
void DMA1_Channel5_IRQHandler(void)
|
|||
|
{
|
|||
|
if( DMA_GetFlagStatus( DMA1_FLAG_TC5 ) == SET )
|
|||
|
{
|
|||
|
DMA_ClearITPendingBit( DMA1_FLAG_TC5 );
|
|||
|
SysLog("DMA1_TC5!") ;
|
|||
|
Dma_Hook(DMA1_FLAG_TC5) ;
|
|||
|
}
|
|||
|
if( DMA_GetFlagStatus( DMA1_FLAG_TE5 ) == SET )
|
|||
|
{
|
|||
|
DMA_ClearITPendingBit( DMA1_FLAG_TE5 );
|
|||
|
SysErr("DMA1_TE5!") ;
|
|||
|
Dma_Hook(DMA1_FLAG_TE5) ;
|
|||
|
}
|
|||
|
}
|
|||
|
|
|||
|
/****************************************************************************
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD>ƣ<EFBFBD>DMA1_Channel4_IRQHandler
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: DMA1_Channel4<EFBFBD>жϴ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
* ע <EFBFBD>⣺<EFBFBD><EFBFBD>DMA_CNDTRx = 0 ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ӧ<EFBFBD>жϡ<EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>TXΪ<EFBFBD>䳤DMA<EFBFBD><EFBFBD><EFBFBD>ȣ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɾͻ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>TC<EFBFBD>жϡ<EFBFBD><EFBFBD><EFBFBD>RXΪ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ե<EFBFBD>DMA_CNDTRx<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѭ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>0<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ջ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
|||
|
****************************************************************************/
|
|||
|
void DMA1_Channel6_IRQHandler(void)
|
|||
|
{
|
|||
|
if( DMA_GetFlagStatus( DMA1_FLAG_TC6 ) == SET )
|
|||
|
{
|
|||
|
DMA_ClearITPendingBit( DMA1_FLAG_TC6 );
|
|||
|
SysLog("DMA1_TC6!") ;
|
|||
|
Dma_Hook(DMA1_FLAG_TC6) ;
|
|||
|
}
|
|||
|
if( DMA_GetFlagStatus( DMA1_FLAG_TE6 ) == SET )
|
|||
|
{
|
|||
|
DMA_ClearITPendingBit( DMA1_FLAG_TE6 ) ;
|
|||
|
SysErr("DMA1_TE6!") ;
|
|||
|
Dma_Hook(DMA1_FLAG_TE6) ;
|
|||
|
}
|
|||
|
}
|
|||
|
|
|||
|
/****************************************************************************
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD>ƣ<EFBFBD>DMA1_Channel4_IRQHandler
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: DMA1_Channel4<EFBFBD>жϴ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
* ע <EFBFBD>⣺<EFBFBD><EFBFBD>DMA_CNDTRx = 0 ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ӧ<EFBFBD>жϡ<EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>TXΪ<EFBFBD>䳤DMA<EFBFBD><EFBFBD><EFBFBD>ȣ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɾͻ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>TC<EFBFBD>жϡ<EFBFBD><EFBFBD><EFBFBD>RXΪ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ե<EFBFBD>DMA_CNDTRx<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѭ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>0<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ջ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
|||
|
****************************************************************************/
|
|||
|
void DMA1_Channel7_IRQHandler(void)
|
|||
|
{
|
|||
|
if( DMA_GetFlagStatus( DMA1_FLAG_TC7 ) == SET )
|
|||
|
{
|
|||
|
DMA_ClearITPendingBit( DMA1_FLAG_TC7 );
|
|||
|
SysLog("DMA1_TC7!") ;
|
|||
|
Dma_Hook(DMA1_FLAG_TC7) ;
|
|||
|
}
|
|||
|
if( DMA_GetFlagStatus( DMA1_FLAG_TE7 ) == SET )
|
|||
|
{
|
|||
|
DMA_ClearITPendingBit( DMA1_FLAG_TE7 );
|
|||
|
SysErr("DMA1_TE7!") ;
|
|||
|
Dma_Hook(DMA1_FLAG_TE7) ;
|
|||
|
}
|
|||
|
}
|
|||
|
|
|||
|
/****************************************************************************
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD>ƣ<EFBFBD>DMA1_Channel4_IRQHandler
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: DMA1_Channel4<EFBFBD>жϴ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
* ע <EFBFBD>⣺<EFBFBD><EFBFBD>DMA_CNDTRx = 0 ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ӧ<EFBFBD>жϡ<EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>TXΪ<EFBFBD>䳤DMA<EFBFBD><EFBFBD><EFBFBD>ȣ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɾͻ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>TC<EFBFBD>жϡ<EFBFBD><EFBFBD><EFBFBD>RXΪ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ե<EFBFBD>DMA_CNDTRx<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѭ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>0<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ջ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
|||
|
****************************************************************************/
|
|||
|
void DMA2_Channel1_IRQHandler(void)
|
|||
|
{
|
|||
|
if( DMA_GetFlagStatus( DMA2_FLAG_TC1 ) == SET )
|
|||
|
{
|
|||
|
DMA_ClearITPendingBit( DMA2_FLAG_TC1 );
|
|||
|
SysLog("DMA2_TC1!") ;
|
|||
|
Dma_Hook(DMA2_FLAG_TC1) ;
|
|||
|
}
|
|||
|
if( DMA_GetFlagStatus( DMA2_FLAG_TE1 ) == SET )
|
|||
|
{
|
|||
|
DMA_ClearITPendingBit( DMA2_FLAG_TE1 );
|
|||
|
SysErr("DMA2_TE2!") ;
|
|||
|
Dma_Hook(DMA2_FLAG_TE1) ;
|
|||
|
}
|
|||
|
}
|
|||
|
|
|||
|
/****************************************************************************
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD>ƣ<EFBFBD>DMA1_Channel4_IRQHandler
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: DMA1_Channel4<EFBFBD>жϴ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
* ע <EFBFBD>⣺<EFBFBD><EFBFBD>DMA_CNDTRx = 0 ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ӧ<EFBFBD>жϡ<EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>TXΪ<EFBFBD>䳤DMA<EFBFBD><EFBFBD><EFBFBD>ȣ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɾͻ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>TC<EFBFBD>жϡ<EFBFBD><EFBFBD><EFBFBD>RXΪ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ե<EFBFBD>DMA_CNDTRx<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѭ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>0<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ջ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
|||
|
****************************************************************************/
|
|||
|
void DMA2_Channel2_IRQHandler(void)
|
|||
|
{
|
|||
|
if( DMA_GetFlagStatus( DMA2_FLAG_TC2 ) == SET )
|
|||
|
{
|
|||
|
DMA_ClearITPendingBit( DMA2_FLAG_TC2 );
|
|||
|
SysLog("DMA2_TC2!") ;
|
|||
|
Dma_Hook(DMA2_FLAG_TC2) ;
|
|||
|
}
|
|||
|
if( DMA_GetFlagStatus( DMA2_FLAG_TE2 ) == SET )
|
|||
|
{
|
|||
|
DMA_ClearITPendingBit( DMA2_FLAG_TE2 );
|
|||
|
SysErr("DMA2_TE2!") ;
|
|||
|
Dma_Hook(DMA2_FLAG_TE2) ;
|
|||
|
}
|
|||
|
}
|
|||
|
|
|||
|
/****************************************************************************
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD>ƣ<EFBFBD>DMA1_Channel4_IRQHandler
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: DMA1_Channel4<EFBFBD>жϴ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
* ע <EFBFBD>⣺<EFBFBD><EFBFBD>DMA_CNDTRx = 0 ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ӧ<EFBFBD>жϡ<EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>TXΪ<EFBFBD>䳤DMA<EFBFBD><EFBFBD><EFBFBD>ȣ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɾͻ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>TC<EFBFBD>жϡ<EFBFBD><EFBFBD><EFBFBD>RXΪ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ե<EFBFBD>DMA_CNDTRx<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѭ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>0<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ջ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
|||
|
****************************************************************************/
|
|||
|
void DMA2_Channel3_IRQHandler(void)
|
|||
|
{
|
|||
|
if( DMA_GetFlagStatus( DMA2_FLAG_TC3 ) == SET )
|
|||
|
{
|
|||
|
DMA_ClearITPendingBit( DMA2_FLAG_TC3 );
|
|||
|
SysLog("DMA2_TC3!") ;
|
|||
|
Dma_Hook(DMA2_FLAG_TC3) ;
|
|||
|
}
|
|||
|
if( DMA_GetFlagStatus( DMA2_FLAG_TE3 ) == SET )
|
|||
|
{
|
|||
|
DMA_ClearITPendingBit( DMA2_FLAG_TE3 );
|
|||
|
SysErr("DMA2_TE3!") ;
|
|||
|
Dma_Hook(DMA2_FLAG_TE3) ;
|
|||
|
}
|
|||
|
}
|
|||
|
|
|||
|
/****************************************************************************
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD>ƣ<EFBFBD>DMA1_Channel4_IRQHandler
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: DMA1_Channel4<EFBFBD>жϴ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
* ע <EFBFBD>⣺<EFBFBD><EFBFBD>DMA_CNDTRx = 0 ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ӧ<EFBFBD>жϡ<EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>TXΪ<EFBFBD>䳤DMA<EFBFBD><EFBFBD><EFBFBD>ȣ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɾͻ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>TC<EFBFBD>жϡ<EFBFBD><EFBFBD><EFBFBD>RXΪ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ե<EFBFBD>DMA_CNDTRx<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѭ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>0<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ջ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
|||
|
****************************************************************************/
|
|||
|
void DMA2_Channel4_5_IRQHandler(void)
|
|||
|
{
|
|||
|
if( DMA_GetFlagStatus( DMA2_FLAG_TC4 ) == SET )
|
|||
|
{
|
|||
|
DMA_ClearITPendingBit( DMA2_FLAG_TC4 );
|
|||
|
SysLog("DMA2_TC4!") ;
|
|||
|
Dma_Hook(DMA2_FLAG_TC4) ; ;
|
|||
|
}
|
|||
|
if( DMA_GetFlagStatus( DMA2_FLAG_TE4 ) == SET )
|
|||
|
{
|
|||
|
DMA_ClearITPendingBit( DMA2_FLAG_TE4 );
|
|||
|
SysErr("DMA2_TE4!") ;
|
|||
|
Dma_Hook(DMA2_FLAG_TE4) ;
|
|||
|
}
|
|||
|
|
|||
|
if( DMA_GetFlagStatus( DMA2_FLAG_TC5 ) == SET )
|
|||
|
{
|
|||
|
DMA_ClearITPendingBit( DMA2_FLAG_TC5 ); //<2F><><EFBFBD><EFBFBD>LINE0<45>ϵ<EFBFBD><CFB5>жϱ<D0B6>־λ
|
|||
|
SysLog("DMA2_TC5!") ;
|
|||
|
Dma_Hook(DMA2_FLAG_TC5) ;
|
|||
|
}
|
|||
|
if( DMA_GetFlagStatus( DMA2_FLAG_TE5 ) == SET )
|
|||
|
{
|
|||
|
DMA_ClearITPendingBit( DMA2_FLAG_TE5 );
|
|||
|
SysErr("DMA2_TE5!") ;
|
|||
|
Dma_Hook(DMA2_FLAG_TE5) ;
|
|||
|
}
|
|||
|
}
|
|||
|
|
|||
|
|
|||
|
|
|||
|
|
|||
|
|
|||
|
|
|||
|
|
|||
|
|
|||
|
|
|||
|
|
|||
|
|
|||
|
|
|||
|
|
|||
|
|
|||
|
|
|||
|
|
|||
|
|
|||
|
|
|||
|
|
|||
|
|
|||
|
|
|||
|
|
|||
|
|
|||
|
|
|||
|
|
|||
|
|