446 lines
16 KiB
Python
446 lines
16 KiB
Python
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# Copyright lowRISC contributors.
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# Licensed under the Apache License, Version 2.0, see LICENSE for details.
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# SPDX-License-Identifier: Apache-2.0
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"""
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Generate C header from validated register JSON tree
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"""
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import io
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import logging as log
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import sys
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import textwrap
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import warnings
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from typing import List, Optional, Set, TextIO
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from .field import Field
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from .ip_block import IpBlock
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from .params import LocalParam
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from .register import Register
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from .multi_register import MultiRegister
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from .signal import Signal
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from .window import Window
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def genout(outfile: TextIO, msg: str) -> None:
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outfile.write(msg)
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def to_snake_case(s: str) -> str:
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val = []
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for i, ch in enumerate(s):
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if i > 0 and ch.isupper():
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val.append('_')
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val.append(ch)
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return ''.join(val)
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def as_define(s: str) -> str:
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s = s.upper()
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r = ''
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for i in range(0, len(s)):
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r += s[i] if s[i].isalnum() else '_'
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return r
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def first_line(s: str) -> str:
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"""Returns the first line of a multi-line string"""
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return s.splitlines()[0]
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def format_comment(s: str) -> str:
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"""Formats a string to comment wrapped to an 80 character line width
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Returns wrapped string including newline and // comment characters.
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"""
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return '\n'.join(
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textwrap.wrap(
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s, width=77, initial_indent='// ', subsequent_indent='// ')) + '\n'
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def gen_define(name: str,
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args: List[str],
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body: str,
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existing_defines: Set[str],
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indent: str = ' ') -> str:
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r"""Produces a #define string, will split into two lines if a single line
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has a width greater than 80 characters. Result includes newline.
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Arguments:
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name - Name of the #define
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args - List of arguments for the define, provide an empty list if there are
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none
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body - Body of the #define
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existing_defines - set of already generated define names.
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Error if `name` is in `existing_defines`.
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indent - Gives string to prepend on any new lines produced by
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wrapping (default ' ')
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Example result:
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name = 'A_MACRO'
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args = ['arg1', 'arg2'],
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body = 'arg1 + arg2 + 10'
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#define A_MACRO(arg1, arg2) arg1 + arg2 + 10
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When the macro is wrapped the break happens after the argument list (or
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macro name if there is no argument list
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#define A_MACRO(arg1, arg2) \
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arg1 + arg2 + 10
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"""
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if name in existing_defines:
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log.error("Duplicate #define for " + name)
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sys.exit(1)
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if len(args) != 0:
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define_declare = '#define ' + name + '(' + ', '.join(args) + ')'
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else:
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define_declare = '#define ' + name
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oneline_define = define_declare + ' ' + body
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existing_defines.add(name)
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if len(oneline_define) <= 80:
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return oneline_define + '\n'
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return define_declare + ' \\\n' + indent + body + '\n'
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def gen_cdefine_register(outstr: TextIO,
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reg: Register,
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comp: str,
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width: int,
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rnames: Set[str],
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existing_defines: Set[str]) -> None:
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rname = reg.name
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offset = reg.offset
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genout(outstr, format_comment(first_line(reg.desc)))
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defname = as_define(comp + '_' + rname)
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genout(
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outstr,
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gen_define(defname + '_REG_OFFSET', [], hex(offset), existing_defines))
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genout(
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outstr,
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gen_define(defname + '_REG_RESVAL', [],
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hex(reg.resval), existing_defines))
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for field in reg.fields:
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dname = defname + '_' + as_define(field.name)
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field_width = field.bits.width()
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if field_width == 1:
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# single bit
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genout(
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outstr,
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gen_define(dname + '_BIT', [], str(field.bits.lsb),
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existing_defines))
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else:
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# multiple bits (unless it is the whole register)
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if field_width != width:
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mask = field.bits.bitmask() >> field.bits.lsb
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genout(
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outstr,
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gen_define(dname + '_MASK', [], hex(mask),
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existing_defines))
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genout(
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outstr,
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gen_define(dname + '_OFFSET', [], str(field.bits.lsb),
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existing_defines))
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genout(
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outstr,
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gen_define(
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dname + '_FIELD', [],
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'((bitfield_field32_t) {{ .mask = {dname}_MASK, .index = {dname}_OFFSET }})'
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.format(dname=dname), existing_defines))
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if field.enum is not None:
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for enum in field.enum:
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ename = as_define(enum.name)
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value = hex(enum.value)
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genout(
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outstr,
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gen_define(
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defname + '_' + as_define(field.name) +
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'_VALUE_' + ename, [], value, existing_defines))
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genout(outstr, '\n')
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return
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def gen_cdefine_window(outstr: TextIO,
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win: Window,
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comp: str,
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regwidth: int,
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rnames: Set[str],
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existing_defines: Set[str]) -> None:
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offset = win.offset
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genout(outstr, format_comment('Memory area: ' + first_line(win.desc)))
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defname = as_define(comp + '_' + win.name)
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genout(
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outstr,
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gen_define(defname + '_REG_OFFSET', [], hex(offset), existing_defines))
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items = win.items
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genout(
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outstr,
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gen_define(defname + '_SIZE_WORDS', [], str(items), existing_defines))
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items = items * (regwidth // 8)
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genout(
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outstr,
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gen_define(defname + '_SIZE_BYTES', [], str(items), existing_defines))
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wid = win.validbits
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if (wid != regwidth):
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mask = (1 << wid) - 1
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genout(outstr,
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gen_define(defname + '_MASK ', [], hex(mask), existing_defines))
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def gen_cdefines_module_param(outstr: TextIO,
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param: LocalParam,
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module_name: str,
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existing_defines: Set[str]) -> None:
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# Presently there is only one type (int), however if the new types are
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# added, they potentially need to be handled differently.
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known_types = ["int"]
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if param.param_type not in known_types:
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warnings.warn("Cannot generate a module define of type {}"
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.format(param.param_type))
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return
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if param.desc is not None:
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genout(outstr, format_comment(first_line(param.desc)))
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# Heuristic: if the name already has underscores, it's already snake_case,
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# otherwise, assume StudlyCaps and covert it to snake_case.
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param_name = param.name if '_' in param.name else to_snake_case(param.name)
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define_name = as_define(module_name + '_PARAM_' + param_name)
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if param.param_type == "int":
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define = gen_define(define_name, [], param.value,
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existing_defines)
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genout(outstr, define)
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genout(outstr, '\n')
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def gen_cdefines_module_params(outstr: TextIO,
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module_data: IpBlock,
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module_name: str,
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register_width: int,
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existing_defines: Set[str]) -> None:
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module_params = module_data.params
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for param in module_params.get_localparams():
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gen_cdefines_module_param(outstr, param, module_name, existing_defines)
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genout(outstr, format_comment(first_line("Register width")))
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define_name = as_define(module_name + '_PARAM_REG_WIDTH')
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define = gen_define(define_name, [], str(register_width), existing_defines)
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genout(outstr, define)
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genout(outstr, '\n')
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def gen_multireg_field_defines(outstr: TextIO,
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regname: str,
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field: Field,
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subreg_num: int,
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regwidth: int,
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existing_defines: Set[str]) -> None:
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field_width = field.bits.width()
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fields_per_reg = regwidth // field_width
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define_name = regname + '_' + as_define(field.name + "_FIELD_WIDTH")
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define = gen_define(define_name, [], str(field_width), existing_defines)
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genout(outstr, define)
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define_name = regname + '_' + as_define(field.name + "_FIELDS_PER_REG")
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define = gen_define(define_name, [], str(fields_per_reg), existing_defines)
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genout(outstr, define)
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define_name = regname + "_MULTIREG_COUNT"
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define = gen_define(define_name, [], str(subreg_num), existing_defines)
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genout(outstr, define)
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genout(outstr, '\n')
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def gen_cdefine_multireg(outstr: TextIO,
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multireg: MultiRegister,
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component: str,
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regwidth: int,
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rnames: Set[str],
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existing_defines: Set[str]) -> None:
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comment = multireg.reg.desc + " (common parameters)"
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genout(outstr, format_comment(first_line(comment)))
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if len(multireg.reg.fields) == 1:
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regname = as_define(component + '_' + multireg.reg.name)
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gen_multireg_field_defines(outstr, regname, multireg.reg.fields[0],
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len(multireg.regs), regwidth, existing_defines)
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else:
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log.warn("Non-homogeneous multireg " + multireg.reg.name +
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" skip multireg specific data generation.")
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for subreg in multireg.regs:
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gen_cdefine_register(outstr, subreg, component, regwidth, rnames,
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existing_defines)
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def gen_cdefines_interrupt_field(outstr: TextIO,
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interrupt: Signal,
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component: str,
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regwidth: int,
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existing_defines: Set[str]) -> None:
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fieldlsb = interrupt.bits.lsb
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iname = interrupt.name
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defname = as_define(component + '_INTR_COMMON_' + iname)
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if interrupt.bits.width() == 1:
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# single bit
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genout(
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outstr,
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gen_define(defname + '_BIT', [], str(fieldlsb), existing_defines))
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else:
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# multiple bits (unless it is the whole register)
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if interrupt.bits.width() != regwidth:
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mask = interrupt.bits.msb >> fieldlsb
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genout(
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outstr,
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gen_define(defname + '_MASK', [], hex(mask), existing_defines))
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genout(
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outstr,
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gen_define(defname + '_OFFSET', [], str(fieldlsb),
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existing_defines))
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genout(
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outstr,
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gen_define(
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defname + '_FIELD', [],
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'((bitfield_field32_t) {{ .mask = {dname}_MASK, .index = {dname}_OFFSET }})'
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.format(dname=defname), existing_defines))
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def gen_cdefines_interrupts(outstr: TextIO,
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block: IpBlock,
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component: str,
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regwidth: int,
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existing_defines: Set[str]) -> None:
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# If no_auto_intr_regs is true, then we do not generate common defines,
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# because the bit offsets for a particular interrupt may differ between
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# the interrupt enable/state/test registers.
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if block.no_auto_intr:
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return
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genout(outstr, format_comment(first_line("Common Interrupt Offsets")))
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for intr in block.interrupts:
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gen_cdefines_interrupt_field(outstr, intr, component, regwidth,
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existing_defines)
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genout(outstr, '\n')
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def gen_cdefines(block: IpBlock,
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outfile: TextIO,
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src_lic: Optional[str],
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src_copy: str) -> int:
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rnames = block.get_rnames()
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outstr = io.StringIO()
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# This tracks the defines that have been generated so far, so we
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# can error if we attempt to duplicate a definition
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existing_defines = set() # type: Set[str]
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gen_cdefines_module_params(outstr, block, block.name, block.regwidth,
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existing_defines)
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gen_cdefines_interrupts(outstr, block, block.name, block.regwidth,
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existing_defines)
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for rb in block.reg_blocks.values():
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for x in rb.entries:
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if isinstance(x, Register):
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gen_cdefine_register(outstr, x, block.name, block.regwidth, rnames,
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existing_defines)
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continue
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if isinstance(x, MultiRegister):
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gen_cdefine_multireg(outstr, x, block.name, block.regwidth, rnames,
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existing_defines)
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continue
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if isinstance(x, Window):
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gen_cdefine_window(outstr, x, block.name, block.regwidth,
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rnames, existing_defines)
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continue
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generated = outstr.getvalue()
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|
|
outstr.close()
|
||
|
|
|
||
|
|
genout(outfile, '// Generated register defines for ' + block.name + '\n\n')
|
||
|
|
if src_copy != '':
|
||
|
|
genout(outfile, '// Copyright information found in source file:\n')
|
||
|
|
genout(outfile, '// ' + src_copy + '\n\n')
|
||
|
|
if src_lic is not None:
|
||
|
|
genout(outfile, '// Licensing information found in source file:\n')
|
||
|
|
for line in src_lic.splitlines():
|
||
|
|
genout(outfile, '// ' + line + '\n')
|
||
|
|
genout(outfile, '\n')
|
||
|
|
|
||
|
|
# Header Include Guard
|
||
|
|
genout(outfile, '#ifndef _' + as_define(block.name) + '_REG_DEFS_\n')
|
||
|
|
genout(outfile, '#define _' + as_define(block.name) + '_REG_DEFS_\n\n')
|
||
|
|
|
||
|
|
# Header Extern Guard (so header can be used from C and C++)
|
||
|
|
genout(outfile, '#ifdef __cplusplus\n')
|
||
|
|
genout(outfile, 'extern "C" {\n')
|
||
|
|
genout(outfile, '#endif\n')
|
||
|
|
|
||
|
|
genout(outfile, generated)
|
||
|
|
|
||
|
|
# Header Extern Guard
|
||
|
|
genout(outfile, '#ifdef __cplusplus\n')
|
||
|
|
genout(outfile, '} // extern "C"\n')
|
||
|
|
genout(outfile, '#endif\n')
|
||
|
|
|
||
|
|
# Header Include Guard
|
||
|
|
genout(outfile, '#endif // _' + as_define(block.name) + '_REG_DEFS_\n')
|
||
|
|
|
||
|
|
genout(outfile, '// End generated register defines for ' + block.name)
|
||
|
|
|
||
|
|
return 0
|
||
|
|
|
||
|
|
|
||
|
|
def test_gen_define() -> None:
|
||
|
|
basic_oneline = '#define MACRO_NAME body\n'
|
||
|
|
assert gen_define('MACRO_NAME', [], 'body', set()) == basic_oneline
|
||
|
|
|
||
|
|
basic_oneline_with_args = '#define MACRO_NAME(arg1, arg2) arg1 + arg2\n'
|
||
|
|
assert (gen_define('MACRO_NAME', ['arg1', 'arg2'], 'arg1 + arg2',
|
||
|
|
set()) == basic_oneline_with_args)
|
||
|
|
|
||
|
|
long_macro_name = 'A_VERY_VERY_VERY_VERY_VERY_VERY_VERY_VERY_VERY_VERY_VERY_LONG_MACRO_NAME'
|
||
|
|
|
||
|
|
multiline = ('#define ' + long_macro_name + ' \\\n' +
|
||
|
|
' a_fairly_long_body + something_else + 10\n')
|
||
|
|
|
||
|
|
assert (gen_define(long_macro_name, [],
|
||
|
|
'a_fairly_long_body + something_else + 10',
|
||
|
|
set()) == multiline)
|
||
|
|
|
||
|
|
multiline_with_args = ('#define ' + long_macro_name +
|
||
|
|
'(arg1, arg2, arg3) \\\n' +
|
||
|
|
' a_fairly_long_body + arg1 + arg2 + arg3\n')
|
||
|
|
|
||
|
|
assert (gen_define(long_macro_name, ['arg1', 'arg2', 'arg3'],
|
||
|
|
'a_fairly_long_body + arg1 + arg2 + arg3',
|
||
|
|
set()) == multiline_with_args)
|
||
|
|
|
||
|
|
multiline_with_args_big_indent = (
|
||
|
|
'#define ' + long_macro_name + '(arg1, arg2, arg3) \\\n' +
|
||
|
|
' a_fairly_long_body + arg1 + arg2 + arg3\n')
|
||
|
|
|
||
|
|
assert (gen_define(long_macro_name, ['arg1', 'arg2', 'arg3'],
|
||
|
|
'a_fairly_long_body + arg1 + arg2 + arg3',
|
||
|
|
set(),
|
||
|
|
indent=' ') == multiline_with_args_big_indent)
|