143 lines
5.0 KiB
ArmAsm
143 lines
5.0 KiB
ArmAsm
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# RISC-V Compliance Test RV32IM-MULHU-01
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#
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# Copyright (c) 2018, Imperas Software Ltd.
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are met:
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# * Redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer.
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# * Redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution.
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# * Neither the name of the Imperas Software Ltd. nor the
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# names of its contributors may be used to endorse or promote products
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# derived from this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
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# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Imperas Software Ltd. BE LIABLE FOR ANY
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# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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# Specification: RV32IM Base Integer Instruction Set, Version 2.0
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# Description: Testing instruction MULHU.
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#include "test_macros.h"
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#include "compliance_test.h"
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#include "compliance_io.h"
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RV_COMPLIANCE_RV32M
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RV_COMPLIANCE_CODE_BEGIN
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RVTEST_IO_INIT
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RVTEST_IO_ASSERT_GPR_EQ(x31, x0, 0x00000000)
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RVTEST_IO_WRITE_STR(x31, "Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")
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# ---------------------------------------------------------------------------------------------
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RVTEST_IO_WRITE_STR(x31, "# Test number 1 - corner cases\n")
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# address for test results
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la x2, test_1_res
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TEST_RR_SRC2(mulhu, x17, x18, 0, 0x0, 0x0, x2, 0)
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TEST_RR_SRC2(mulhu, x19, x20, 0, 0x0, 0x1, x2, 4)
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TEST_RR_SRC2(mulhu, x21, x22, 0, 0x0, -0x1, x2, 8)
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TEST_RR_SRC2(mulhu, x23, x24, 0, 0x0, 0x7fffffff, x2, 12)
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TEST_RR_SRC2(mulhu, x25, x26, 0, 0x0, 0x80000000, x2, 16)
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# ---------------------------------------------------------------------------------------------
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RVTEST_IO_WRITE_STR(x31, "# Test number 2 - corner cases\n")
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# address for test results
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la x2, test_2_res
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TEST_RR_SRC2(mulhu, x27, x28, 0, 0x1, 0x0, x2, 0)
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TEST_RR_SRC2(mulhu, x29, x30, 0, 0x1, 0x1, x2, 4)
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TEST_RR_SRC2(mulhu, x21, x3, 0, 0x1, -0x1, x2, 8)
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TEST_RR_SRC2(mulhu, x4, x8, 0, 0x1, 0x7fffffff, x2, 12)
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TEST_RR_SRC2(mulhu, x9, x11, 0, 0x1, 0x80000000, x2, 16)
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# ---------------------------------------------------------------------------------------------
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RVTEST_IO_WRITE_STR(x31, "# Test number 3 - corner cases\n")
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# address for test results
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la x2, test_3_res
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TEST_RR_SRC2(mulhu, x12, x13, 0, -0x1, 0x0, x2, 0)
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TEST_RR_SRC2(mulhu, x14, x15, 0, -0x1, 0x1, x2, 4)
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TEST_RR_SRC2(mulhu, x16, x17, 0xfffffffe, -0x1, -0x1, x2, 8)
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TEST_RR_SRC2(mulhu, x18, x19, 0x7ffffffe, -0x1, 0x7fffffff, x2, 12)
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TEST_RR_SRC2(mulhu, x20, x21, 0x7fffffff, -0x1, 0x80000000, x2, 16)
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# ---------------------------------------------------------------------------------------------
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RVTEST_IO_WRITE_STR(x31, "# Test number 4 - corner cases\n")
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# address for test results
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la x2, test_4_res
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TEST_RR_SRC2(mulhu, x22, x23, 0, 0x7fffffff, 0x0, x2, 0)
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TEST_RR_SRC2(mulhu, x24, x25, 0, 0x7fffffff, 0x1, x2, 4)
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TEST_RR_SRC2(mulhu, x26, x27, 0x7ffffffe, 0x7fffffff, -0x1, x2, 8)
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TEST_RR_SRC2(mulhu, x28, x29, 0x3fffffff, 0x7fffffff, 0x7fffffff, x2, 12)
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TEST_RR_SRC2(mulhu, x30, x21, 0x3fffffff, 0x7fffffff, 0x80000000, x2, 16)
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# ---------------------------------------------------------------------------------------------
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RVTEST_IO_WRITE_STR(x31, "# Test number 5 - corner cases\n")
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# address for test results
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la x2, test_5_res
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TEST_RR_SRC2(mulhu, x3, x4, 0, 0x80000000, 0x0, x2, 0)
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TEST_RR_SRC2(mulhu, x8, x9, 0, 0x80000000, 0x1, x2, 4)
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TEST_RR_SRC2(mulhu, x11, x12, 0x7fffffff, 0x80000000, -0x1, x2, 8)
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TEST_RR_SRC2(mulhu, x13, x14, 0x3fffffff, 0x80000000, 0x7fffffff, x2, 12)
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TEST_RR_SRC2(mulhu, x15, x16, 0x40000000, 0x80000000, 0x80000000, x2, 16)
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RVTEST_IO_WRITE_STR(x31, "Test End\n")
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# ---------------------------------------------------------------------------------------------
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RV_COMPLIANCE_HALT
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RV_COMPLIANCE_CODE_END
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# Input data section.
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.data
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# Output data section.
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RV_COMPLIANCE_DATA_BEGIN
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test_1_res:
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.fill 5, 4, -1
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test_2_res:
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.fill 5, 4, -1
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test_3_res:
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.fill 5, 4, -1
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test_4_res:
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.fill 5, 4, -1
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test_5_res:
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.fill 5, 4, -1
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test_6_res:
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.fill 5, 4, -1
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test_7_res:
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.fill 5, 4, -1
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test_8_res:
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.fill 5, 4, -1
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test_9_res:
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.fill 5, 4, -1
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test_10_res:
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.fill 5, 4, -1
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RV_COMPLIANCE_DATA_END
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