tinyriscv/sdk/examples/uart_rx/Makefile

RISCV_ARCH := rv32im
RISCV_ABI := ilp32
RISCV_MCMODEL := medlow


TARGET = uart_rx


#CFLAGS += -DSIMULATION
#CFLAGS += -O2
#ASM_SRCS +=
#LDFLAGS +=
#INCLUDES += -I.

C_SRCS := \
	main.c \


BSP_DIR = ../../bsp
include ../../bsp/bsp.mk
tests: example: add uart rx Signed-off-by: liangkangnan <liangkangnan@163.com> 2020-06-26 14:46:03 +00:00			`RISCV_ARCH := rv32im`
			`RISCV_ABI := ilp32`
			`RISCV_MCMODEL := medlow`


			`TARGET = uart_rx`


			`#CFLAGS += -DSIMULATION`
			`#CFLAGS += -O2`
			`#ASM_SRCS +=`
			`#LDFLAGS +=`
			`#INCLUDES += -I.`

			`C_SRCS := \`
			`main.c \`


temp commit Signed-off-by: liangkangnan <liangkangnan@163.com> 2021-03-29 10:22:52 +00:00			`BSP_DIR = ../../bsp`
			`include ../../bsp/bsp.mk`