71 lines
1.9 KiB
Coq
71 lines
1.9 KiB
Coq
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/*
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Copyright 2020 Blue Liang, liangkangnan@163.com
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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module gpio(
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input wire clk,
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input wire rst,
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input wire we_i,
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input wire req_i,
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input wire[31:0] addr_i,
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input wire[31:0] data_i,
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output reg[31:0] data_o,
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output reg ack_o,
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output wire io_pin
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);
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localparam GPIO_DATA = 4'h4;
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reg[31:0] gpio_data;
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assign io_pin = gpio_data[0];
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always @ (posedge clk) begin
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if (rst == 1'b0) begin
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gpio_data <= 32'h0;
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end else begin
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if (we_i == 1'b1) begin
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case (addr_i[3:0])
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GPIO_DATA: begin
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gpio_data <= data_i;
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end
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endcase
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end
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end
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end
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always @ (*) begin
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if (rst == 1'b0) begin
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data_o <= 32'h0;
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end else begin
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case (addr_i[3:0])
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GPIO_DATA: begin
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data_o <= gpio_data;
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end
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endcase
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end
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end
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endmodule
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