example: reorganization
Signed-off-by: liangkangnan <liangkangnan@163.com>pull/1/head
liangkangnan
parent
115a8ea384
commit
20d1055ea4
501
sim/inst.data
501
sim/inst.data
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21641
sim/out.vvp
21641
sim/out.vvp
File diff suppressed because one or more lines are too long
465550
sim/tinyriscv_soc_tb.vcd
465550
sim/tinyriscv_soc_tb.vcd
File diff suppressed because it is too large
Load Diff
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@ -0,0 +1,18 @@
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RISCV_ARCH := rv32im
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RISCV_ABI := ilp32
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RISCV_PATH := ../../../tools/gnu-mcu-eclipse-riscv-none-gcc-8.2.0-2.2-20190521-0004-win64/
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CFLAGS += -march=$(RISCV_ARCH)
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CFLAGS += -mabi=$(RISCV_ABI)
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CFLAGS += -static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles
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RISCV_GCC := $(abspath $(RISCV_PATH)/bin/riscv-none-embed-gcc)
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RISCV_AS := $(abspath $(RISCV_PATH)/bin/riscv-none-embed-as)
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RISCV_GXX := $(abspath $(RISCV_PATH)/bin/riscv-none-embed-g++)
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RISCV_OBJDUMP := $(abspath $(RISCV_PATH)/bin/riscv-none-embed-objdump)
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RISCV_GDB := $(abspath $(RISCV_PATH)/bin/riscv-none-embed-gdb)
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RISCV_AR := $(abspath $(RISCV_PATH)/bin/riscv-none-embed-ar)
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RISCV_OBJCOPY := $(abspath $(RISCV_PATH)/bin/riscv-none-embed-objcopy)
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RISCV_READELF := $(abspath $(RISCV_PATH)/bin/riscv-none-embed-readelf)
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RISCV_ARCH := rv32im
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RISCV_ABI := ilp32
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RISCV_PATH := ../../../tools/gnu-mcu-eclipse-riscv-none-gcc-8.2.0-2.2-20190521-0004-win64/
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CFLAGS += -march=$(RISCV_ARCH)
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CFLAGS += -mabi=$(RISCV_ABI)
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CFLAGS += -static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles
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RISCV_GCC := $(abspath $(RISCV_PATH)/bin/riscv-none-embed-gcc)
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RISCV_AS := $(abspath $(RISCV_PATH)/bin/riscv-none-embed-as)
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RISCV_GXX := $(abspath $(RISCV_PATH)/bin/riscv-none-embed-g++)
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RISCV_OBJDUMP := $(abspath $(RISCV_PATH)/bin/riscv-none-embed-objdump)
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RISCV_GDB := $(abspath $(RISCV_PATH)/bin/riscv-none-embed-gdb)
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RISCV_AR := $(abspath $(RISCV_PATH)/bin/riscv-none-embed-ar)
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RISCV_OBJCOPY := $(abspath $(RISCV_PATH)/bin/riscv-none-embed-objcopy)
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RISCV_READELF := $(abspath $(RISCV_PATH)/bin/riscv-none-embed-readelf)
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include ../common.mk
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.PHONY: all
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all:
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$(RISCV_GCC) $(CFLAGS) start.S main.c -Tlink.ld -o gpio
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$(RISCV_GCC) $(CFLAGS) ../start.S main.c -T ../link.lds -o gpio
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$(RISCV_OBJCOPY) -O binary gpio gpio.bin
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$(RISCV_OBJDUMP) --disassemble-all gpio > gpio.dump
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Binary file not shown.
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@ -5,132 +5,199 @@ gpio: file format elf32-littleriscv
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Disassembly of section .init:
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00000000 <_start>:
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0: 0040006f j 4 <_reset_handler>
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0: 0080006f j 8 <_reset_handler>
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4: 0640006f j 68 <_timer0_handler>
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00000004 <_reset_handler>:
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4: 10000197 auipc gp,0x10000
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8: 7fc18193 addi gp,gp,2044 # 10000800 <__global_pointer$>
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c: 00018113 mv sp,gp
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10: 00000d13 li s10,0
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14: 00000d93 li s11,0
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18: 1d000513 li a0,464
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1c: 10000597 auipc a1,0x10000
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20: fe458593 addi a1,a1,-28 # 10000000 <_data>
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24: 10000617 auipc a2,0x10000
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28: fdc60613 addi a2,a2,-36 # 10000000 <_data>
|
||||
2c: 00c5fc63 bgeu a1,a2,44 <_reset_handler+0x40>
|
||||
30: 00052283 lw t0,0(a0)
|
||||
34: 0055a023 sw t0,0(a1)
|
||||
38: 00450513 addi a0,a0,4
|
||||
3c: 00458593 addi a1,a1,4
|
||||
40: fec5e8e3 bltu a1,a2,30 <_reset_handler+0x2c>
|
||||
44: 10000517 auipc a0,0x10000
|
||||
48: fbc50513 addi a0,a0,-68 # 10000000 <_data>
|
||||
4c: 10000597 auipc a1,0x10000
|
||||
50: fb458593 addi a1,a1,-76 # 10000000 <_data>
|
||||
54: 00b57863 bgeu a0,a1,64 <_reset_handler+0x60>
|
||||
58: 00052023 sw zero,0(a0)
|
||||
5c: 00450513 addi a0,a0,4
|
||||
60: feb56ce3 bltu a0,a1,58 <_reset_handler+0x54>
|
||||
64: 134000ef jal ra,198 <main>
|
||||
68: 00100d13 li s10,1
|
||||
00000008 <_reset_handler>:
|
||||
8: 10000197 auipc gp,0x10000
|
||||
c: 7f818193 addi gp,gp,2040 # 10000800 <__global_pointer$>
|
||||
10: 00018113 mv sp,gp
|
||||
14: 2d400513 li a0,724
|
||||
18: 10000597 auipc a1,0x10000
|
||||
1c: fe858593 addi a1,a1,-24 # 10000000 <_data>
|
||||
20: 10000617 auipc a2,0x10000
|
||||
24: fe060613 addi a2,a2,-32 # 10000000 <_data>
|
||||
28: 00c5fc63 bgeu a1,a2,40 <_reset_handler+0x38>
|
||||
2c: 00052283 lw t0,0(a0)
|
||||
30: 0055a023 sw t0,0(a1)
|
||||
34: 00450513 addi a0,a0,4
|
||||
38: 00458593 addi a1,a1,4
|
||||
3c: fec5e8e3 bltu a1,a2,2c <_reset_handler+0x24>
|
||||
40: 10000517 auipc a0,0x10000
|
||||
44: fc050513 addi a0,a0,-64 # 10000000 <_data>
|
||||
48: 10000597 auipc a1,0x10000
|
||||
4c: fb858593 addi a1,a1,-72 # 10000000 <_data>
|
||||
50: 00b57863 bgeu a0,a1,60 <_reset_handler+0x58>
|
||||
54: 00052023 sw zero,0(a0)
|
||||
58: 00450513 addi a0,a0,4
|
||||
5c: feb56ce3 bltu a0,a1,54 <_reset_handler+0x4c>
|
||||
60: 23c000ef jal ra,29c <main>
|
||||
|
||||
0000006c <loop>:
|
||||
6c: 0000006f j 6c <loop>
|
||||
00000064 <loop>:
|
||||
64: 0000006f j 64 <loop>
|
||||
|
||||
00000068 <_timer0_handler>:
|
||||
68: f8010113 addi sp,sp,-128
|
||||
6c: 00112223 sw ra,4(sp)
|
||||
70: 00212423 sw sp,8(sp)
|
||||
74: 00312623 sw gp,12(sp)
|
||||
78: 00412823 sw tp,16(sp)
|
||||
7c: 00512a23 sw t0,20(sp)
|
||||
80: 00612c23 sw t1,24(sp)
|
||||
84: 00712e23 sw t2,28(sp)
|
||||
88: 02812023 sw s0,32(sp)
|
||||
8c: 02912223 sw s1,36(sp)
|
||||
90: 02a12423 sw a0,40(sp)
|
||||
94: 02b12623 sw a1,44(sp)
|
||||
98: 02c12823 sw a2,48(sp)
|
||||
9c: 02d12a23 sw a3,52(sp)
|
||||
a0: 02e12c23 sw a4,56(sp)
|
||||
a4: 02f12e23 sw a5,60(sp)
|
||||
a8: 05012023 sw a6,64(sp)
|
||||
ac: 05112223 sw a7,68(sp)
|
||||
b0: 05212423 sw s2,72(sp)
|
||||
b4: 05312623 sw s3,76(sp)
|
||||
b8: 05412823 sw s4,80(sp)
|
||||
bc: 05512a23 sw s5,84(sp)
|
||||
c0: 05612c23 sw s6,88(sp)
|
||||
c4: 05712e23 sw s7,92(sp)
|
||||
c8: 07812023 sw s8,96(sp)
|
||||
cc: 07912223 sw s9,100(sp)
|
||||
d0: 07a12423 sw s10,104(sp)
|
||||
d4: 07b12623 sw s11,108(sp)
|
||||
d8: 07c12823 sw t3,112(sp)
|
||||
dc: 07d12a23 sw t4,116(sp)
|
||||
e0: 07e12c23 sw t5,120(sp)
|
||||
e4: 07f12e23 sw t6,124(sp)
|
||||
e8: 00000097 auipc ra,0x0
|
||||
ec: 000000e7 jalr zero # 0 <_start>
|
||||
f0: 00412083 lw ra,4(sp)
|
||||
f4: 00812103 lw sp,8(sp)
|
||||
f8: 00c12183 lw gp,12(sp)
|
||||
fc: 01012203 lw tp,16(sp)
|
||||
100: 01412283 lw t0,20(sp)
|
||||
104: 01812303 lw t1,24(sp)
|
||||
108: 01c12383 lw t2,28(sp)
|
||||
10c: 02012403 lw s0,32(sp)
|
||||
110: 02412483 lw s1,36(sp)
|
||||
114: 02812503 lw a0,40(sp)
|
||||
118: 02c12583 lw a1,44(sp)
|
||||
11c: 03012603 lw a2,48(sp)
|
||||
120: 03412683 lw a3,52(sp)
|
||||
124: 03812703 lw a4,56(sp)
|
||||
128: 03c12783 lw a5,60(sp)
|
||||
12c: 04012803 lw a6,64(sp)
|
||||
130: 04412883 lw a7,68(sp)
|
||||
134: 04812903 lw s2,72(sp)
|
||||
138: 04c12983 lw s3,76(sp)
|
||||
13c: 05012a03 lw s4,80(sp)
|
||||
140: 05412a83 lw s5,84(sp)
|
||||
144: 05812b03 lw s6,88(sp)
|
||||
148: 05c12b83 lw s7,92(sp)
|
||||
14c: 06012c03 lw s8,96(sp)
|
||||
150: 06412c83 lw s9,100(sp)
|
||||
154: 06812d03 lw s10,104(sp)
|
||||
158: 06c12d83 lw s11,108(sp)
|
||||
15c: 07012e03 lw t3,112(sp)
|
||||
160: 07412e83 lw t4,116(sp)
|
||||
164: 07812f03 lw t5,120(sp)
|
||||
168: 07c12f83 lw t6,124(sp)
|
||||
16c: 08010113 addi sp,sp,128
|
||||
170: 30200073 mret
|
||||
|
||||
Disassembly of section .text:
|
||||
|
||||
00000070 <delay_ms>:
|
||||
70: fb010113 addi sp,sp,-80
|
||||
74: 04812623 sw s0,76(sp)
|
||||
78: 05010413 addi s0,sp,80
|
||||
7c: faa42e23 sw a0,-68(s0)
|
||||
80: c0002773 rdcycle a4
|
||||
84: fee42623 sw a4,-20(s0)
|
||||
88: fec42703 lw a4,-20(s0)
|
||||
8c: fee42023 sw a4,-32(s0)
|
||||
90: fe042223 sw zero,-28(s0)
|
||||
94: c8002773 rdcycleh a4
|
||||
98: fce42e23 sw a4,-36(s0)
|
||||
9c: fdc42703 lw a4,-36(s0)
|
||||
a0: 00070793 mv a5,a4
|
||||
a4: 00000813 li a6,0
|
||||
a8: 00079e93 slli t4,a5,0x0
|
||||
ac: 00000e13 li t3,0
|
||||
b0: fe042683 lw a3,-32(s0)
|
||||
b4: fe442703 lw a4,-28(s0)
|
||||
b8: 01c687b3 add a5,a3,t3
|
||||
bc: 00078513 mv a0,a5
|
||||
c0: 00d53533 sltu a0,a0,a3
|
||||
c4: 01d70833 add a6,a4,t4
|
||||
c8: 01050733 add a4,a0,a6
|
||||
cc: 00070813 mv a6,a4
|
||||
d0: fef42023 sw a5,-32(s0)
|
||||
d4: ff042223 sw a6,-28(s0)
|
||||
d8: c00027f3 rdcycle a5
|
||||
dc: fcf42c23 sw a5,-40(s0)
|
||||
e0: fd842783 lw a5,-40(s0)
|
||||
e4: fcf42823 sw a5,-48(s0)
|
||||
e8: fc042a23 sw zero,-44(s0)
|
||||
ec: c80027f3 rdcycleh a5
|
||||
f0: fcf42623 sw a5,-52(s0)
|
||||
f4: fcc42783 lw a5,-52(s0)
|
||||
f8: 00078f13 mv t5,a5
|
||||
fc: 00000f93 li t6,0
|
||||
100: 000f1393 slli t2,t5,0x0
|
||||
104: 00000313 li t1,0
|
||||
108: fd042683 lw a3,-48(s0)
|
||||
10c: fd442703 lw a4,-44(s0)
|
||||
110: 006687b3 add a5,a3,t1
|
||||
114: 00078513 mv a0,a5
|
||||
118: 00d53533 sltu a0,a0,a3
|
||||
11c: 00770833 add a6,a4,t2
|
||||
120: 01050733 add a4,a0,a6
|
||||
124: 00070813 mv a6,a4
|
||||
128: fcf42823 sw a5,-48(s0)
|
||||
12c: fd042a23 sw a6,-44(s0)
|
||||
130: fbc42703 lw a4,-68(s0)
|
||||
134: 0000c7b7 lui a5,0xc
|
||||
138: 35078793 addi a5,a5,848 # c350 <__stack_size+0xbf50>
|
||||
13c: 02f707b3 mul a5,a4,a5
|
||||
140: 00078593 mv a1,a5
|
||||
144: 00000613 li a2,0
|
||||
148: fe042683 lw a3,-32(s0)
|
||||
14c: fe442703 lw a4,-28(s0)
|
||||
150: 00d587b3 add a5,a1,a3
|
||||
154: 00078513 mv a0,a5
|
||||
158: 00b53533 sltu a0,a0,a1
|
||||
15c: 00e60833 add a6,a2,a4
|
||||
160: 01050733 add a4,a0,a6
|
||||
164: 00070813 mv a6,a4
|
||||
168: fd442703 lw a4,-44(s0)
|
||||
16c: 00080693 mv a3,a6
|
||||
170: f6d764e3 bltu a4,a3,d8 <delay_ms+0x68>
|
||||
174: fd442703 lw a4,-44(s0)
|
||||
178: 00080693 mv a3,a6
|
||||
17c: 00d71663 bne a4,a3,188 <delay_ms+0x118>
|
||||
180: fd042703 lw a4,-48(s0)
|
||||
184: f4f76ae3 bltu a4,a5,d8 <delay_ms+0x68>
|
||||
188: 00000013 nop
|
||||
18c: 04c12403 lw s0,76(sp)
|
||||
190: 05010113 addi sp,sp,80
|
||||
194: 00008067 ret
|
||||
00000174 <delay_ms>:
|
||||
174: fb010113 addi sp,sp,-80
|
||||
178: 04812623 sw s0,76(sp)
|
||||
17c: 05010413 addi s0,sp,80
|
||||
180: faa42e23 sw a0,-68(s0)
|
||||
184: c0002773 rdcycle a4
|
||||
188: fee42623 sw a4,-20(s0)
|
||||
18c: fec42703 lw a4,-20(s0)
|
||||
190: fee42023 sw a4,-32(s0)
|
||||
194: fe042223 sw zero,-28(s0)
|
||||
198: c8002773 rdcycleh a4
|
||||
19c: fce42e23 sw a4,-36(s0)
|
||||
1a0: fdc42703 lw a4,-36(s0)
|
||||
1a4: 00070793 mv a5,a4
|
||||
1a8: 00000813 li a6,0
|
||||
1ac: 00079e93 slli t4,a5,0x0
|
||||
1b0: 00000e13 li t3,0
|
||||
1b4: fe042683 lw a3,-32(s0)
|
||||
1b8: fe442703 lw a4,-28(s0)
|
||||
1bc: 01c687b3 add a5,a3,t3
|
||||
1c0: 00078513 mv a0,a5
|
||||
1c4: 00d53533 sltu a0,a0,a3
|
||||
1c8: 01d70833 add a6,a4,t4
|
||||
1cc: 01050733 add a4,a0,a6
|
||||
1d0: 00070813 mv a6,a4
|
||||
1d4: fef42023 sw a5,-32(s0)
|
||||
1d8: ff042223 sw a6,-28(s0)
|
||||
1dc: c00027f3 rdcycle a5
|
||||
1e0: fcf42c23 sw a5,-40(s0)
|
||||
1e4: fd842783 lw a5,-40(s0)
|
||||
1e8: fcf42823 sw a5,-48(s0)
|
||||
1ec: fc042a23 sw zero,-44(s0)
|
||||
1f0: c80027f3 rdcycleh a5
|
||||
1f4: fcf42623 sw a5,-52(s0)
|
||||
1f8: fcc42783 lw a5,-52(s0)
|
||||
1fc: 00078f13 mv t5,a5
|
||||
200: 00000f93 li t6,0
|
||||
204: 000f1393 slli t2,t5,0x0
|
||||
208: 00000313 li t1,0
|
||||
20c: fd042683 lw a3,-48(s0)
|
||||
210: fd442703 lw a4,-44(s0)
|
||||
214: 006687b3 add a5,a3,t1
|
||||
218: 00078513 mv a0,a5
|
||||
21c: 00d53533 sltu a0,a0,a3
|
||||
220: 00770833 add a6,a4,t2
|
||||
224: 01050733 add a4,a0,a6
|
||||
228: 00070813 mv a6,a4
|
||||
22c: fcf42823 sw a5,-48(s0)
|
||||
230: fd042a23 sw a6,-44(s0)
|
||||
234: fbc42703 lw a4,-68(s0)
|
||||
238: 0000c7b7 lui a5,0xc
|
||||
23c: 35078793 addi a5,a5,848 # c350 <__stack_size+0xbf50>
|
||||
240: 02f707b3 mul a5,a4,a5
|
||||
244: 00078593 mv a1,a5
|
||||
248: 00000613 li a2,0
|
||||
24c: fe042683 lw a3,-32(s0)
|
||||
250: fe442703 lw a4,-28(s0)
|
||||
254: 00d587b3 add a5,a1,a3
|
||||
258: 00078513 mv a0,a5
|
||||
25c: 00b53533 sltu a0,a0,a1
|
||||
260: 00e60833 add a6,a2,a4
|
||||
264: 01050733 add a4,a0,a6
|
||||
268: 00070813 mv a6,a4
|
||||
26c: fd442703 lw a4,-44(s0)
|
||||
270: 00080693 mv a3,a6
|
||||
274: f6d764e3 bltu a4,a3,1dc <delay_ms+0x68>
|
||||
278: fd442703 lw a4,-44(s0)
|
||||
27c: 00080693 mv a3,a6
|
||||
280: 00d71663 bne a4,a3,28c <delay_ms+0x118>
|
||||
284: fd042703 lw a4,-48(s0)
|
||||
288: f4f76ae3 bltu a4,a5,1dc <delay_ms+0x68>
|
||||
28c: 00000013 nop
|
||||
290: 04c12403 lw s0,76(sp)
|
||||
294: 05010113 addi sp,sp,80
|
||||
298: 00008067 ret
|
||||
|
||||
00000198 <main>:
|
||||
198: ff010113 addi sp,sp,-16
|
||||
19c: 00112623 sw ra,12(sp)
|
||||
1a0: 00812423 sw s0,8(sp)
|
||||
1a4: 01010413 addi s0,sp,16
|
||||
1a8: 400007b7 lui a5,0x40000
|
||||
1ac: 00478793 addi a5,a5,4 # 40000004 <__global_pointer$+0x2ffff804>
|
||||
1b0: 0007a703 lw a4,0(a5)
|
||||
1b4: 400007b7 lui a5,0x40000
|
||||
1b8: 00478793 addi a5,a5,4 # 40000004 <__global_pointer$+0x2ffff804>
|
||||
1bc: 00174713 xori a4,a4,1
|
||||
1c0: 00e7a023 sw a4,0(a5)
|
||||
1c4: 1f400513 li a0,500
|
||||
1c8: ea9ff0ef jal ra,70 <delay_ms>
|
||||
1cc: fddff06f j 1a8 <main+0x10>
|
||||
0000029c <main>:
|
||||
29c: ff010113 addi sp,sp,-16
|
||||
2a0: 00112623 sw ra,12(sp)
|
||||
2a4: 00812423 sw s0,8(sp)
|
||||
2a8: 01010413 addi s0,sp,16
|
||||
2ac: 400007b7 lui a5,0x40000
|
||||
2b0: 00478793 addi a5,a5,4 # 40000004 <__global_pointer$+0x2ffff804>
|
||||
2b4: 0007a703 lw a4,0(a5)
|
||||
2b8: 400007b7 lui a5,0x40000
|
||||
2bc: 00478793 addi a5,a5,4 # 40000004 <__global_pointer$+0x2ffff804>
|
||||
2c0: 00174713 xori a4,a4,1
|
||||
2c4: 00e7a023 sw a4,0(a5)
|
||||
2c8: 1f400513 li a0,500
|
||||
2cc: ea9ff0ef jal ra,174 <delay_ms>
|
||||
2d0: fddff06f j 2ac <main+0x10>
|
||||
|
||||
Disassembly of section .stack:
|
||||
|
||||
|
|
@ -144,11 +211,11 @@ Disassembly of section .comment:
|
|||
4: 2820 fld fs0,80(s0)
|
||||
6: 20554e47 fmsub.s ft8,fa0,ft5,ft4,rmm
|
||||
a: 434d li t1,19
|
||||
c: 2055 jal b0 <delay_ms+0x40>
|
||||
c: 2055 jal b0 <_timer0_handler+0x48>
|
||||
e: 6345 lui t1,0x11
|
||||
10: 696c flw fa1,84(a0)
|
||||
12: 7370 flw fa2,100(a4)
|
||||
14: 2065 jal bc <delay_ms+0x4c>
|
||||
14: 2065 jal bc <_timer0_handler+0x54>
|
||||
16: 4952 lw s2,20(sp)
|
||||
18: 562d4353 0x562d4353
|
||||
1c: 4520 lw s0,72(a0)
|
||||
|
|
|
|||
|
|
@ -1,22 +1,12 @@
|
|||
#include <stdint.h>
|
||||
|
||||
|
||||
// GPIO regs
|
||||
#define GPIO_BASE (0x40000000)
|
||||
#define GPIO_DATA (GPIO_BASE + (0x04))
|
||||
|
||||
|
||||
#define GPIO_REG(addr) (*((volatile uint32_t *)addr))
|
||||
#include "../include/gpio.h"
|
||||
#include "../include/utils.h"
|
||||
|
||||
|
||||
#define MS(ms) (ms * 50000)
|
||||
|
||||
|
||||
#define read_csr(reg) ({ unsigned long __tmp; \
|
||||
asm volatile ("csrr %0, " #reg : "=r"(__tmp)); \
|
||||
__tmp; })
|
||||
|
||||
|
||||
|
||||
static void delay_ms(uint32_t ms)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -1,46 +0,0 @@
|
|||
.section .init;
|
||||
.globl _start;
|
||||
.type _start,@function
|
||||
|
||||
|
||||
_start:
|
||||
j _reset_handler
|
||||
|
||||
_reset_handler:
|
||||
.option push
|
||||
.option norelax
|
||||
la gp, __global_pointer$
|
||||
.option pop
|
||||
la sp, _sp
|
||||
li x26, 0x00
|
||||
li x27, 0x00
|
||||
|
||||
/* Load data section */
|
||||
la a0, _data_lma
|
||||
la a1, _data
|
||||
la a2, _edata
|
||||
bgeu a1, a2, 2f
|
||||
1:
|
||||
lw t0, (a0)
|
||||
sw t0, (a1)
|
||||
addi a0, a0, 4
|
||||
addi a1, a1, 4
|
||||
bltu a1, a2, 1b
|
||||
2:
|
||||
|
||||
/* Clear bss section */
|
||||
la a0, __bss_start
|
||||
la a1, _end
|
||||
bgeu a0, a1, 2f
|
||||
1:
|
||||
sw zero, (a0)
|
||||
addi a0, a0, 4
|
||||
bltu a0, a1, 1b
|
||||
2:
|
||||
|
||||
call main
|
||||
|
||||
li x26, 0x01
|
||||
|
||||
loop:
|
||||
j loop
|
||||
|
|
@ -0,0 +1,9 @@
|
|||
#ifndef _GPIO_H_
|
||||
#define _GPIO_H_
|
||||
|
||||
#define GPIO_BASE (0x40000000)
|
||||
#define GPIO_DATA (GPIO_BASE + (0x04))
|
||||
|
||||
#define GPIO_REG(addr) (*((volatile uint32_t *)addr))
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,11 @@
|
|||
#ifndef _TIMER_H_
|
||||
#define _TIMER_H_
|
||||
|
||||
#define TIMER0_BASE (0x20000000)
|
||||
#define TIMER0_CTRL (TIMER0_BASE + (0x00))
|
||||
#define TIMER0_COUNT (TIMER0_BASE + (0x04))
|
||||
#define TIMER0_VALUE (TIMER0_BASE + (0x08))
|
||||
|
||||
#define TIMER0_REG(addr) (*((volatile uint32_t *)addr))
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,12 @@
|
|||
#ifndef _UART_H_
|
||||
#define _UART_H_
|
||||
|
||||
#define UART0_BASE (0x30000000)
|
||||
#define UART0_CTRL (UART0_BASE + (0x00))
|
||||
#define UART0_STATUS (UART0_BASE + (0x04))
|
||||
#define UART0_BAUD (UART0_BASE + (0x08))
|
||||
#define UART0_TXDATA (UART0_BASE + (0x0c))
|
||||
|
||||
#define UART0_REG(addr) (*((volatile uint32_t *)addr))
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,9 @@
|
|||
#ifndef _UTILS_H_
|
||||
#define _UTILS_H_
|
||||
|
||||
#define read_csr(reg) ({ unsigned long __tmp; \
|
||||
asm volatile ("csrr %0, " #reg : "=r"(__tmp)); \
|
||||
__tmp; })
|
||||
|
||||
|
||||
#endif
|
||||
|
|
@ -18,8 +18,6 @@ _reset_handler:
|
|||
la gp, __global_pointer$
|
||||
.option pop
|
||||
la sp, _sp
|
||||
li x26, 0x00
|
||||
li x27, 0x00
|
||||
|
||||
/* Load data section */
|
||||
la a0, _data_lma
|
||||
|
|
@ -46,8 +44,6 @@ _reset_handler:
|
|||
|
||||
call main
|
||||
|
||||
li x26, 0x01
|
||||
|
||||
loop:
|
||||
j loop
|
||||
|
||||
|
|
@ -79,8 +75,8 @@ _timer0_handler:
|
|||
STORE x23, 23*REGBYTES(sp)
|
||||
STORE x24, 24*REGBYTES(sp)
|
||||
STORE x25, 25*REGBYTES(sp)
|
||||
#STORE x26, 26*REGBYTES(sp)
|
||||
#STORE x27, 27*REGBYTES(sp)
|
||||
STORE x26, 26*REGBYTES(sp)
|
||||
STORE x27, 27*REGBYTES(sp)
|
||||
STORE x28, 28*REGBYTES(sp)
|
||||
STORE x29, 29*REGBYTES(sp)
|
||||
STORE x30, 30*REGBYTES(sp)
|
||||
|
|
@ -113,8 +109,8 @@ _timer0_handler:
|
|||
LOAD x23, 23*REGBYTES(sp)
|
||||
LOAD x24, 24*REGBYTES(sp)
|
||||
LOAD x25, 25*REGBYTES(sp)
|
||||
#LOAD x26, 26*REGBYTES(sp)
|
||||
#LOAD x27, 27*REGBYTES(sp)
|
||||
LOAD x26, 26*REGBYTES(sp)
|
||||
LOAD x27, 27*REGBYTES(sp)
|
||||
LOAD x28, 28*REGBYTES(sp)
|
||||
LOAD x29, 29*REGBYTES(sp)
|
||||
LOAD x30, 30*REGBYTES(sp)
|
||||
|
|
@ -1,25 +1,9 @@
|
|||
|
||||
RISCV_ARCH := rv32im
|
||||
RISCV_ABI := ilp32
|
||||
|
||||
RISCV_PATH := ../../../tools/gnu-mcu-eclipse-riscv-none-gcc-8.2.0-2.2-20190521-0004-win64/
|
||||
|
||||
CFLAGS += -march=$(RISCV_ARCH)
|
||||
CFLAGS += -mabi=$(RISCV_ABI)
|
||||
CFLAGS += -static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles
|
||||
|
||||
RISCV_GCC := $(abspath $(RISCV_PATH)/bin/riscv-none-embed-gcc)
|
||||
RISCV_AS := $(abspath $(RISCV_PATH)/bin/riscv-none-embed-as)
|
||||
RISCV_GXX := $(abspath $(RISCV_PATH)/bin/riscv-none-embed-g++)
|
||||
RISCV_OBJDUMP := $(abspath $(RISCV_PATH)/bin/riscv-none-embed-objdump)
|
||||
RISCV_GDB := $(abspath $(RISCV_PATH)/bin/riscv-none-embed-gdb)
|
||||
RISCV_AR := $(abspath $(RISCV_PATH)/bin/riscv-none-embed-ar)
|
||||
RISCV_OBJCOPY := $(abspath $(RISCV_PATH)/bin/riscv-none-embed-objcopy)
|
||||
RISCV_READELF := $(abspath $(RISCV_PATH)/bin/riscv-none-embed-readelf)
|
||||
include ../common.mk
|
||||
|
||||
|
||||
.PHONY: all
|
||||
all:
|
||||
$(RISCV_GCC) $(CFLAGS) start.S main.c -Tlink.ld -o timer_int
|
||||
$(RISCV_GCC) $(CFLAGS) ../start.S main.c -T ../link.lds -o timer_int
|
||||
$(RISCV_OBJCOPY) -O binary timer_int timer_int.bin
|
||||
$(RISCV_OBJDUMP) --disassemble-all timer_int > timer_int.dump
|
||||
|
|
|
|||
|
|
@ -1,147 +0,0 @@
|
|||
OUTPUT_ARCH( "riscv" )
|
||||
ENTRY(_start)
|
||||
|
||||
|
||||
MEMORY
|
||||
{
|
||||
flash (wxa!ri) : ORIGIN = 0x00000000, LENGTH = 4K
|
||||
ram (wxa!ri) : ORIGIN = 0x10000000, LENGTH = 2K
|
||||
}
|
||||
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
__stack_size = DEFINED(__stack_size) ? __stack_size : 1K;
|
||||
|
||||
.init :
|
||||
{
|
||||
KEEP (*(SORT_NONE(.init)))
|
||||
} >flash AT>flash
|
||||
|
||||
.text :
|
||||
{
|
||||
*(.text.unlikely .text.unlikely.*)
|
||||
*(.text.startup .text.startup.*)
|
||||
*(.text .text.*)
|
||||
*(.gnu.linkonce.t.*)
|
||||
} >flash AT>flash
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
PROVIDE (__etext = .);
|
||||
PROVIDE (_etext = .);
|
||||
PROVIDE (etext = .);
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
} >flash AT>flash
|
||||
|
||||
.init_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
|
||||
KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
} >flash AT>flash
|
||||
|
||||
.fini_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
|
||||
KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
} >flash AT>flash
|
||||
|
||||
.ctors :
|
||||
{
|
||||
/* gcc uses crtbegin.o to find the start of
|
||||
the constructors, so we make sure it is
|
||||
first. Because this is a wildcard, it
|
||||
doesn't matter if the user does not
|
||||
actually link against crtbegin.o; the
|
||||
linker won't look for a file to match a
|
||||
wildcard. The wildcard also means that it
|
||||
doesn't matter which directory crtbegin.o
|
||||
is in. */
|
||||
KEEP (*crtbegin.o(.ctors))
|
||||
KEEP (*crtbegin?.o(.ctors))
|
||||
/* We don't want to include the .ctor section from
|
||||
the crtend.o file until after the sorted ctors.
|
||||
The .ctor section from the crtend file contains the
|
||||
end of ctors marker and it must be last */
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
|
||||
KEEP (*(SORT(.ctors.*)))
|
||||
KEEP (*(.ctors))
|
||||
} >flash AT>flash
|
||||
|
||||
.dtors :
|
||||
{
|
||||
KEEP (*crtbegin.o(.dtors))
|
||||
KEEP (*crtbegin?.o(.dtors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
|
||||
KEEP (*(SORT(.dtors.*)))
|
||||
KEEP (*(.dtors))
|
||||
} >flash AT>flash
|
||||
|
||||
.lalign :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE( _data_lma = . );
|
||||
} >flash AT>flash
|
||||
|
||||
.dalign :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE( _data = . );
|
||||
} >ram AT>flash
|
||||
|
||||
.data :
|
||||
{
|
||||
*(.rdata)
|
||||
*(.rodata .rodata.*)
|
||||
*(.gnu.linkonce.r.*)
|
||||
*(.data .data.*)
|
||||
*(.gnu.linkonce.d.*)
|
||||
. = ALIGN(8);
|
||||
PROVIDE( __global_pointer$ = . + 0x800 );
|
||||
*(.sdata .sdata.*)
|
||||
*(.gnu.linkonce.s.*)
|
||||
. = ALIGN(8);
|
||||
*(.srodata.cst16)
|
||||
*(.srodata.cst8)
|
||||
*(.srodata.cst4)
|
||||
*(.srodata.cst2)
|
||||
*(.srodata .srodata.*)
|
||||
} >ram AT>flash
|
||||
|
||||
. = ALIGN(4);
|
||||
PROVIDE( _edata = . );
|
||||
PROVIDE( edata = . );
|
||||
|
||||
PROVIDE( _fbss = . );
|
||||
PROVIDE( __bss_start = . );
|
||||
.bss :
|
||||
{
|
||||
*(.sbss*)
|
||||
*(.gnu.linkonce.sb.*)
|
||||
*(.bss .bss.*)
|
||||
*(.gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
} >ram AT>ram
|
||||
|
||||
. = ALIGN(8);
|
||||
PROVIDE( _end = . );
|
||||
PROVIDE( end = . );
|
||||
|
||||
.stack ORIGIN(ram) + LENGTH(ram) - __stack_size :
|
||||
{
|
||||
PROVIDE( _heap_end = . );
|
||||
. = __stack_size;
|
||||
PROVIDE( _sp = . );
|
||||
} >ram AT>ram
|
||||
|
||||
}
|
||||
|
|
@ -1,43 +1,25 @@
|
|||
#include <stdint.h>
|
||||
|
||||
|
||||
// Timer0 regs
|
||||
#define TIMER0_BASE (0x20000000)
|
||||
#define TIMER0_CTRL (TIMER0_BASE + (0x00))
|
||||
#define TIMER0_COUNT (TIMER0_BASE + (0x04))
|
||||
#define TIMER0_VALUE (TIMER0_BASE + (0x08))
|
||||
|
||||
#define TIMER0_REG(addr) (*((volatile uint32_t *)addr))
|
||||
#include "../include/timer.h"
|
||||
#include "../include/gpio.h"
|
||||
|
||||
|
||||
static uint32_t count;
|
||||
|
||||
|
||||
static void set_test_pass()
|
||||
{
|
||||
asm("li x27, 0x01");
|
||||
}
|
||||
|
||||
static void set_test_fail()
|
||||
{
|
||||
asm("li x27, 0x00");
|
||||
}
|
||||
|
||||
|
||||
int main()
|
||||
{
|
||||
count = 0;
|
||||
|
||||
TIMER0_REG(TIMER0_VALUE) = 500; // 10us period
|
||||
TIMER0_REG(TIMER0_VALUE) = 50000; // 1ms period
|
||||
TIMER0_REG(TIMER0_CTRL) = 0x07; // enable interrupt and start timer
|
||||
|
||||
GPIO_REG(GPIO_DATA) = 0x1;
|
||||
|
||||
while (1) {
|
||||
if (count == 10) {
|
||||
TIMER0_REG(TIMER0_CTRL) = 0x00;
|
||||
if (count >= 500) {
|
||||
count = 0;
|
||||
// TODO: do something
|
||||
set_test_pass();
|
||||
break;
|
||||
GPIO_REG(GPIO_DATA) ^= 0x1;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
Binary file not shown.
Binary file not shown.
|
|
@ -6,176 +6,162 @@ Disassembly of section .init:
|
|||
|
||||
00000000 <_start>:
|
||||
0: 0080006f j 8 <_reset_handler>
|
||||
4: 06c0006f j 70 <_timer0_handler>
|
||||
4: 0600006f j 64 <_timer0_handler>
|
||||
|
||||
00000008 <_reset_handler>:
|
||||
8: 10000197 auipc gp,0x10000
|
||||
c: 7f818193 addi gp,gp,2040 # 10000800 <__global_pointer$>
|
||||
10: 00018113 mv sp,gp
|
||||
14: 00000d13 li s10,0
|
||||
18: 00000d93 li s11,0
|
||||
1c: 26c00513 li a0,620
|
||||
20: 10000597 auipc a1,0x10000
|
||||
24: fe058593 addi a1,a1,-32 # 10000000 <_data>
|
||||
28: 10000617 auipc a2,0x10000
|
||||
2c: fd860613 addi a2,a2,-40 # 10000000 <_data>
|
||||
30: 00c5fc63 bgeu a1,a2,48 <_reset_handler+0x40>
|
||||
34: 00052283 lw t0,0(a0)
|
||||
38: 0055a023 sw t0,0(a1)
|
||||
3c: 00450513 addi a0,a0,4
|
||||
40: 00458593 addi a1,a1,4
|
||||
44: fec5e8e3 bltu a1,a2,34 <_reset_handler+0x2c>
|
||||
48: 10000517 auipc a0,0x10000
|
||||
4c: fb850513 addi a0,a0,-72 # 10000000 <_data>
|
||||
50: 80818593 addi a1,gp,-2040 # 10000008 <_end>
|
||||
54: 00b57863 bgeu a0,a1,64 <_reset_handler+0x5c>
|
||||
58: 00052023 sw zero,0(a0)
|
||||
5c: 00450513 addi a0,a0,4
|
||||
60: feb56ce3 bltu a0,a1,58 <_reset_handler+0x50>
|
||||
64: 144000ef jal ra,1a8 <main>
|
||||
68: 00100d13 li s10,1
|
||||
14: 24400513 li a0,580
|
||||
18: 10000597 auipc a1,0x10000
|
||||
1c: fe858593 addi a1,a1,-24 # 10000000 <_data>
|
||||
20: 10000617 auipc a2,0x10000
|
||||
24: fe060613 addi a2,a2,-32 # 10000000 <_data>
|
||||
28: 00c5fc63 bgeu a1,a2,40 <_reset_handler+0x38>
|
||||
2c: 00052283 lw t0,0(a0)
|
||||
30: 0055a023 sw t0,0(a1)
|
||||
34: 00450513 addi a0,a0,4
|
||||
38: 00458593 addi a1,a1,4
|
||||
3c: fec5e8e3 bltu a1,a2,2c <_reset_handler+0x24>
|
||||
40: 10000517 auipc a0,0x10000
|
||||
44: fc050513 addi a0,a0,-64 # 10000000 <_data>
|
||||
48: 80818593 addi a1,gp,-2040 # 10000008 <_end>
|
||||
4c: 00b57863 bgeu a0,a1,5c <_reset_handler+0x54>
|
||||
50: 00052023 sw zero,0(a0)
|
||||
54: 00450513 addi a0,a0,4
|
||||
58: feb56ce3 bltu a0,a1,50 <_reset_handler+0x48>
|
||||
5c: 110000ef jal ra,16c <main>
|
||||
|
||||
0000006c <loop>:
|
||||
6c: 0000006f j 6c <loop>
|
||||
00000060 <loop>:
|
||||
60: 0000006f j 60 <loop>
|
||||
|
||||
00000070 <_timer0_handler>:
|
||||
70: f8010113 addi sp,sp,-128
|
||||
74: 00112223 sw ra,4(sp)
|
||||
78: 00212423 sw sp,8(sp)
|
||||
7c: 00312623 sw gp,12(sp)
|
||||
80: 00412823 sw tp,16(sp)
|
||||
84: 00512a23 sw t0,20(sp)
|
||||
88: 00612c23 sw t1,24(sp)
|
||||
8c: 00712e23 sw t2,28(sp)
|
||||
90: 02812023 sw s0,32(sp)
|
||||
94: 02912223 sw s1,36(sp)
|
||||
98: 02a12423 sw a0,40(sp)
|
||||
9c: 02b12623 sw a1,44(sp)
|
||||
a0: 02c12823 sw a2,48(sp)
|
||||
a4: 02d12a23 sw a3,52(sp)
|
||||
a8: 02e12c23 sw a4,56(sp)
|
||||
ac: 02f12e23 sw a5,60(sp)
|
||||
b0: 05012023 sw a6,64(sp)
|
||||
b4: 05112223 sw a7,68(sp)
|
||||
b8: 05212423 sw s2,72(sp)
|
||||
bc: 05312623 sw s3,76(sp)
|
||||
c0: 05412823 sw s4,80(sp)
|
||||
c4: 05512a23 sw s5,84(sp)
|
||||
c8: 05612c23 sw s6,88(sp)
|
||||
cc: 05712e23 sw s7,92(sp)
|
||||
d0: 07812023 sw s8,96(sp)
|
||||
d4: 07912223 sw s9,100(sp)
|
||||
d8: 07c12823 sw t3,112(sp)
|
||||
dc: 07d12a23 sw t4,116(sp)
|
||||
e0: 07e12c23 sw t5,120(sp)
|
||||
e4: 07f12e23 sw t6,124(sp)
|
||||
e8: 140000ef jal ra,228 <TIMER0_IRQHandler>
|
||||
ec: 00412083 lw ra,4(sp)
|
||||
f0: 00812103 lw sp,8(sp)
|
||||
f4: 00c12183 lw gp,12(sp)
|
||||
f8: 01012203 lw tp,16(sp)
|
||||
fc: 01412283 lw t0,20(sp)
|
||||
100: 01812303 lw t1,24(sp)
|
||||
104: 01c12383 lw t2,28(sp)
|
||||
108: 02012403 lw s0,32(sp)
|
||||
10c: 02412483 lw s1,36(sp)
|
||||
110: 02812503 lw a0,40(sp)
|
||||
114: 02c12583 lw a1,44(sp)
|
||||
118: 03012603 lw a2,48(sp)
|
||||
11c: 03412683 lw a3,52(sp)
|
||||
120: 03812703 lw a4,56(sp)
|
||||
124: 03c12783 lw a5,60(sp)
|
||||
128: 04012803 lw a6,64(sp)
|
||||
12c: 04412883 lw a7,68(sp)
|
||||
130: 04812903 lw s2,72(sp)
|
||||
134: 04c12983 lw s3,76(sp)
|
||||
138: 05012a03 lw s4,80(sp)
|
||||
13c: 05412a83 lw s5,84(sp)
|
||||
140: 05812b03 lw s6,88(sp)
|
||||
144: 05c12b83 lw s7,92(sp)
|
||||
148: 06012c03 lw s8,96(sp)
|
||||
14c: 06412c83 lw s9,100(sp)
|
||||
150: 07012e03 lw t3,112(sp)
|
||||
154: 07412e83 lw t4,116(sp)
|
||||
158: 07812f03 lw t5,120(sp)
|
||||
15c: 07c12f83 lw t6,124(sp)
|
||||
160: 08010113 addi sp,sp,128
|
||||
164: 30200073 mret
|
||||
00000064 <_timer0_handler>:
|
||||
64: f8010113 addi sp,sp,-128
|
||||
68: 00112223 sw ra,4(sp)
|
||||
6c: 00212423 sw sp,8(sp)
|
||||
70: 00312623 sw gp,12(sp)
|
||||
74: 00412823 sw tp,16(sp)
|
||||
78: 00512a23 sw t0,20(sp)
|
||||
7c: 00612c23 sw t1,24(sp)
|
||||
80: 00712e23 sw t2,28(sp)
|
||||
84: 02812023 sw s0,32(sp)
|
||||
88: 02912223 sw s1,36(sp)
|
||||
8c: 02a12423 sw a0,40(sp)
|
||||
90: 02b12623 sw a1,44(sp)
|
||||
94: 02c12823 sw a2,48(sp)
|
||||
98: 02d12a23 sw a3,52(sp)
|
||||
9c: 02e12c23 sw a4,56(sp)
|
||||
a0: 02f12e23 sw a5,60(sp)
|
||||
a4: 05012023 sw a6,64(sp)
|
||||
a8: 05112223 sw a7,68(sp)
|
||||
ac: 05212423 sw s2,72(sp)
|
||||
b0: 05312623 sw s3,76(sp)
|
||||
b4: 05412823 sw s4,80(sp)
|
||||
b8: 05512a23 sw s5,84(sp)
|
||||
bc: 05612c23 sw s6,88(sp)
|
||||
c0: 05712e23 sw s7,92(sp)
|
||||
c4: 07812023 sw s8,96(sp)
|
||||
c8: 07912223 sw s9,100(sp)
|
||||
cc: 07a12423 sw s10,104(sp)
|
||||
d0: 07b12623 sw s11,108(sp)
|
||||
d4: 07c12823 sw t3,112(sp)
|
||||
d8: 07d12a23 sw t4,116(sp)
|
||||
dc: 07e12c23 sw t5,120(sp)
|
||||
e0: 07f12e23 sw t6,124(sp)
|
||||
e4: 110000ef jal ra,1f4 <TIMER0_IRQHandler>
|
||||
e8: 00412083 lw ra,4(sp)
|
||||
ec: 00812103 lw sp,8(sp)
|
||||
f0: 00c12183 lw gp,12(sp)
|
||||
f4: 01012203 lw tp,16(sp)
|
||||
f8: 01412283 lw t0,20(sp)
|
||||
fc: 01812303 lw t1,24(sp)
|
||||
100: 01c12383 lw t2,28(sp)
|
||||
104: 02012403 lw s0,32(sp)
|
||||
108: 02412483 lw s1,36(sp)
|
||||
10c: 02812503 lw a0,40(sp)
|
||||
110: 02c12583 lw a1,44(sp)
|
||||
114: 03012603 lw a2,48(sp)
|
||||
118: 03412683 lw a3,52(sp)
|
||||
11c: 03812703 lw a4,56(sp)
|
||||
120: 03c12783 lw a5,60(sp)
|
||||
124: 04012803 lw a6,64(sp)
|
||||
128: 04412883 lw a7,68(sp)
|
||||
12c: 04812903 lw s2,72(sp)
|
||||
130: 04c12983 lw s3,76(sp)
|
||||
134: 05012a03 lw s4,80(sp)
|
||||
138: 05412a83 lw s5,84(sp)
|
||||
13c: 05812b03 lw s6,88(sp)
|
||||
140: 05c12b83 lw s7,92(sp)
|
||||
144: 06012c03 lw s8,96(sp)
|
||||
148: 06412c83 lw s9,100(sp)
|
||||
14c: 06812d03 lw s10,104(sp)
|
||||
150: 06c12d83 lw s11,108(sp)
|
||||
154: 07012e03 lw t3,112(sp)
|
||||
158: 07412e83 lw t4,116(sp)
|
||||
15c: 07812f03 lw t5,120(sp)
|
||||
160: 07c12f83 lw t6,124(sp)
|
||||
164: 08010113 addi sp,sp,128
|
||||
168: 30200073 mret
|
||||
|
||||
Disassembly of section .text:
|
||||
|
||||
00000168 <set_test_pass>:
|
||||
168: ff010113 addi sp,sp,-16
|
||||
16c: 00812623 sw s0,12(sp)
|
||||
170: 01010413 addi s0,sp,16
|
||||
174: 00100d93 li s11,1
|
||||
178: 00000013 nop
|
||||
17c: 00c12403 lw s0,12(sp)
|
||||
180: 01010113 addi sp,sp,16
|
||||
184: 00008067 ret
|
||||
0000016c <main>:
|
||||
16c: ff010113 addi sp,sp,-16
|
||||
170: 00812623 sw s0,12(sp)
|
||||
174: 01010413 addi s0,sp,16
|
||||
178: 10000797 auipc a5,0x10000
|
||||
17c: e8878793 addi a5,a5,-376 # 10000000 <_data>
|
||||
180: 0007a023 sw zero,0(a5)
|
||||
184: 200007b7 lui a5,0x20000
|
||||
188: 00878793 addi a5,a5,8 # 20000008 <__global_pointer$+0xffff808>
|
||||
18c: 0000c737 lui a4,0xc
|
||||
190: 35070713 addi a4,a4,848 # c350 <__stack_size+0xbf50>
|
||||
194: 00e7a023 sw a4,0(a5)
|
||||
198: 200007b7 lui a5,0x20000
|
||||
19c: 00700713 li a4,7
|
||||
1a0: 00e7a023 sw a4,0(a5) # 20000000 <__global_pointer$+0xffff800>
|
||||
1a4: 400007b7 lui a5,0x40000
|
||||
1a8: 00478793 addi a5,a5,4 # 40000004 <__global_pointer$+0x2ffff804>
|
||||
1ac: 00100713 li a4,1
|
||||
1b0: 00e7a023 sw a4,0(a5)
|
||||
1b4: 10000797 auipc a5,0x10000
|
||||
1b8: e4c78793 addi a5,a5,-436 # 10000000 <_data>
|
||||
1bc: 0007a703 lw a4,0(a5)
|
||||
1c0: 1f300793 li a5,499
|
||||
1c4: fee7f8e3 bgeu a5,a4,1b4 <main+0x48>
|
||||
1c8: 10000797 auipc a5,0x10000
|
||||
1cc: e3878793 addi a5,a5,-456 # 10000000 <_data>
|
||||
1d0: 0007a023 sw zero,0(a5)
|
||||
1d4: 400007b7 lui a5,0x40000
|
||||
1d8: 00478793 addi a5,a5,4 # 40000004 <__global_pointer$+0x2ffff804>
|
||||
1dc: 0007a703 lw a4,0(a5)
|
||||
1e0: 400007b7 lui a5,0x40000
|
||||
1e4: 00478793 addi a5,a5,4 # 40000004 <__global_pointer$+0x2ffff804>
|
||||
1e8: 00174713 xori a4,a4,1
|
||||
1ec: 00e7a023 sw a4,0(a5)
|
||||
1f0: fc5ff06f j 1b4 <main+0x48>
|
||||
|
||||
00000188 <set_test_fail>:
|
||||
188: ff010113 addi sp,sp,-16
|
||||
18c: 00812623 sw s0,12(sp)
|
||||
190: 01010413 addi s0,sp,16
|
||||
194: 00000d93 li s11,0
|
||||
198: 00000013 nop
|
||||
19c: 00c12403 lw s0,12(sp)
|
||||
1a0: 01010113 addi sp,sp,16
|
||||
1a4: 00008067 ret
|
||||
|
||||
000001a8 <main>:
|
||||
1a8: ff010113 addi sp,sp,-16
|
||||
1ac: 00112623 sw ra,12(sp)
|
||||
1b0: 00812423 sw s0,8(sp)
|
||||
1b4: 01010413 addi s0,sp,16
|
||||
1b8: 10000797 auipc a5,0x10000
|
||||
1bc: e4878793 addi a5,a5,-440 # 10000000 <_data>
|
||||
1c0: 0007a023 sw zero,0(a5)
|
||||
1c4: 200007b7 lui a5,0x20000
|
||||
1c8: 00878793 addi a5,a5,8 # 20000008 <__global_pointer$+0xffff808>
|
||||
1cc: 1f400713 li a4,500
|
||||
1d0: 00e7a023 sw a4,0(a5)
|
||||
1d4: 200007b7 lui a5,0x20000
|
||||
1d8: 00700713 li a4,7
|
||||
1dc: 00e7a023 sw a4,0(a5) # 20000000 <__global_pointer$+0xffff800>
|
||||
1e0: 10000797 auipc a5,0x10000
|
||||
1e4: e2078793 addi a5,a5,-480 # 10000000 <_data>
|
||||
1e8: 0007a703 lw a4,0(a5)
|
||||
1ec: 00a00793 li a5,10
|
||||
1f0: fef718e3 bne a4,a5,1e0 <main+0x38>
|
||||
1f4: 200007b7 lui a5,0x20000
|
||||
1f8: 0007a023 sw zero,0(a5) # 20000000 <__global_pointer$+0xffff800>
|
||||
1fc: 10000797 auipc a5,0x10000
|
||||
200: e0478793 addi a5,a5,-508 # 10000000 <_data>
|
||||
204: 0007a023 sw zero,0(a5)
|
||||
208: f61ff0ef jal ra,168 <set_test_pass>
|
||||
20c: 00000013 nop
|
||||
210: 00000793 li a5,0
|
||||
214: 00078513 mv a0,a5
|
||||
218: 00c12083 lw ra,12(sp)
|
||||
21c: 00812403 lw s0,8(sp)
|
||||
220: 01010113 addi sp,sp,16
|
||||
224: 00008067 ret
|
||||
|
||||
00000228 <TIMER0_IRQHandler>:
|
||||
228: ff010113 addi sp,sp,-16
|
||||
22c: 00812623 sw s0,12(sp)
|
||||
230: 01010413 addi s0,sp,16
|
||||
234: 200007b7 lui a5,0x20000
|
||||
238: 00700713 li a4,7
|
||||
23c: 00e7a023 sw a4,0(a5) # 20000000 <__global_pointer$+0xffff800>
|
||||
240: 10000797 auipc a5,0x10000
|
||||
244: dc078793 addi a5,a5,-576 # 10000000 <_data>
|
||||
248: 0007a783 lw a5,0(a5)
|
||||
24c: 00178713 addi a4,a5,1
|
||||
250: 10000797 auipc a5,0x10000
|
||||
254: db078793 addi a5,a5,-592 # 10000000 <_data>
|
||||
258: 00e7a023 sw a4,0(a5)
|
||||
25c: 00000013 nop
|
||||
260: 00c12403 lw s0,12(sp)
|
||||
264: 01010113 addi sp,sp,16
|
||||
268: 00008067 ret
|
||||
000001f4 <TIMER0_IRQHandler>:
|
||||
1f4: ff010113 addi sp,sp,-16
|
||||
1f8: 00812623 sw s0,12(sp)
|
||||
1fc: 01010413 addi s0,sp,16
|
||||
200: 200007b7 lui a5,0x20000
|
||||
204: 00700713 li a4,7
|
||||
208: 00e7a023 sw a4,0(a5) # 20000000 <__global_pointer$+0xffff800>
|
||||
20c: 10000797 auipc a5,0x10000
|
||||
210: df478793 addi a5,a5,-524 # 10000000 <_data>
|
||||
214: 0007a783 lw a5,0(a5)
|
||||
218: 00178713 addi a4,a5,1
|
||||
21c: 10000797 auipc a5,0x10000
|
||||
220: de478793 addi a5,a5,-540 # 10000000 <_data>
|
||||
224: 00e7a023 sw a4,0(a5)
|
||||
228: 400007b7 lui a5,0x40000
|
||||
22c: 00478793 addi a5,a5,4 # 40000004 <__global_pointer$+0x2ffff804>
|
||||
230: 0007a023 sw zero,0(a5)
|
||||
234: 00000013 nop
|
||||
238: 00c12403 lw s0,12(sp)
|
||||
23c: 01010113 addi sp,sp,16
|
||||
240: 00008067 ret
|
||||
|
||||
Disassembly of section .bss:
|
||||
|
||||
|
|
@ -195,11 +181,11 @@ Disassembly of section .comment:
|
|||
4: 2820 fld fs0,80(s0)
|
||||
6: 20554e47 fmsub.s ft8,fa0,ft5,ft4,rmm
|
||||
a: 434d li t1,19
|
||||
c: 2055 jal b0 <_timer0_handler+0x40>
|
||||
c: 2055 jal b0 <_timer0_handler+0x4c>
|
||||
e: 6345 lui t1,0x11
|
||||
10: 696c flw fa1,84(a0)
|
||||
12: 7370 flw fa2,100(a4)
|
||||
14: 2065 jal bc <_timer0_handler+0x4c>
|
||||
14: 2065 jal bc <_timer0_handler+0x58>
|
||||
16: 4952 lw s2,20(sp)
|
||||
18: 562d4353 0x562d4353
|
||||
1c: 4520 lw s0,72(a0)
|
||||
|
|
|
|||
|
|
@ -1,25 +1,9 @@
|
|||
|
||||
RISCV_ARCH := rv32im
|
||||
RISCV_ABI := ilp32
|
||||
|
||||
RISCV_PATH := ../../../tools/gnu-mcu-eclipse-riscv-none-gcc-8.2.0-2.2-20190521-0004-win64/
|
||||
|
||||
CFLAGS += -march=$(RISCV_ARCH)
|
||||
CFLAGS += -mabi=$(RISCV_ABI)
|
||||
CFLAGS += -static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles
|
||||
|
||||
RISCV_GCC := $(abspath $(RISCV_PATH)/bin/riscv-none-embed-gcc)
|
||||
RISCV_AS := $(abspath $(RISCV_PATH)/bin/riscv-none-embed-as)
|
||||
RISCV_GXX := $(abspath $(RISCV_PATH)/bin/riscv-none-embed-g++)
|
||||
RISCV_OBJDUMP := $(abspath $(RISCV_PATH)/bin/riscv-none-embed-objdump)
|
||||
RISCV_GDB := $(abspath $(RISCV_PATH)/bin/riscv-none-embed-gdb)
|
||||
RISCV_AR := $(abspath $(RISCV_PATH)/bin/riscv-none-embed-ar)
|
||||
RISCV_OBJCOPY := $(abspath $(RISCV_PATH)/bin/riscv-none-embed-objcopy)
|
||||
RISCV_READELF := $(abspath $(RISCV_PATH)/bin/riscv-none-embed-readelf)
|
||||
include ../common.mk
|
||||
|
||||
|
||||
.PHONY: all
|
||||
all:
|
||||
$(RISCV_GCC) $(CFLAGS) start.S main.c xprintf.c -Tlink.ld -o uart_tx
|
||||
$(RISCV_GCC) $(CFLAGS) ../start.S main.c xprintf.c -T ../link.lds -o uart_tx
|
||||
$(RISCV_OBJCOPY) -O binary uart_tx uart_tx.bin
|
||||
$(RISCV_OBJDUMP) --disassemble-all uart_tx > uart_tx.dump
|
||||
|
|
|
|||
|
|
@ -1,147 +0,0 @@
|
|||
OUTPUT_ARCH( "riscv" )
|
||||
ENTRY(_start)
|
||||
|
||||
|
||||
MEMORY
|
||||
{
|
||||
flash (wxa!ri) : ORIGIN = 0x00000000, LENGTH = 4K
|
||||
ram (wxa!ri) : ORIGIN = 0x10000000, LENGTH = 2K
|
||||
}
|
||||
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
__stack_size = DEFINED(__stack_size) ? __stack_size : 1K;
|
||||
|
||||
.init :
|
||||
{
|
||||
KEEP (*(SORT_NONE(.init)))
|
||||
} >flash AT>flash
|
||||
|
||||
.text :
|
||||
{
|
||||
*(.text.unlikely .text.unlikely.*)
|
||||
*(.text.startup .text.startup.*)
|
||||
*(.text .text.*)
|
||||
*(.gnu.linkonce.t.*)
|
||||
} >flash AT>flash
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
PROVIDE (__etext = .);
|
||||
PROVIDE (_etext = .);
|
||||
PROVIDE (etext = .);
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
} >flash AT>flash
|
||||
|
||||
.init_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
|
||||
KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
} >flash AT>flash
|
||||
|
||||
.fini_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
|
||||
KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
} >flash AT>flash
|
||||
|
||||
.ctors :
|
||||
{
|
||||
/* gcc uses crtbegin.o to find the start of
|
||||
the constructors, so we make sure it is
|
||||
first. Because this is a wildcard, it
|
||||
doesn't matter if the user does not
|
||||
actually link against crtbegin.o; the
|
||||
linker won't look for a file to match a
|
||||
wildcard. The wildcard also means that it
|
||||
doesn't matter which directory crtbegin.o
|
||||
is in. */
|
||||
KEEP (*crtbegin.o(.ctors))
|
||||
KEEP (*crtbegin?.o(.ctors))
|
||||
/* We don't want to include the .ctor section from
|
||||
the crtend.o file until after the sorted ctors.
|
||||
The .ctor section from the crtend file contains the
|
||||
end of ctors marker and it must be last */
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
|
||||
KEEP (*(SORT(.ctors.*)))
|
||||
KEEP (*(.ctors))
|
||||
} >flash AT>flash
|
||||
|
||||
.dtors :
|
||||
{
|
||||
KEEP (*crtbegin.o(.dtors))
|
||||
KEEP (*crtbegin?.o(.dtors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
|
||||
KEEP (*(SORT(.dtors.*)))
|
||||
KEEP (*(.dtors))
|
||||
} >flash AT>flash
|
||||
|
||||
.lalign :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE( _data_lma = . );
|
||||
} >flash AT>flash
|
||||
|
||||
.dalign :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE( _data = . );
|
||||
} >ram AT>flash
|
||||
|
||||
.data :
|
||||
{
|
||||
*(.rdata)
|
||||
*(.rodata .rodata.*)
|
||||
*(.gnu.linkonce.r.*)
|
||||
*(.data .data.*)
|
||||
*(.gnu.linkonce.d.*)
|
||||
. = ALIGN(8);
|
||||
PROVIDE( __global_pointer$ = . + 0x800 );
|
||||
*(.sdata .sdata.*)
|
||||
*(.gnu.linkonce.s.*)
|
||||
. = ALIGN(8);
|
||||
*(.srodata.cst16)
|
||||
*(.srodata.cst8)
|
||||
*(.srodata.cst4)
|
||||
*(.srodata.cst2)
|
||||
*(.srodata .srodata.*)
|
||||
} >ram AT>flash
|
||||
|
||||
. = ALIGN(4);
|
||||
PROVIDE( _edata = . );
|
||||
PROVIDE( edata = . );
|
||||
|
||||
PROVIDE( _fbss = . );
|
||||
PROVIDE( __bss_start = . );
|
||||
.bss :
|
||||
{
|
||||
*(.sbss*)
|
||||
*(.gnu.linkonce.sb.*)
|
||||
*(.bss .bss.*)
|
||||
*(.gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
} >ram AT>ram
|
||||
|
||||
. = ALIGN(8);
|
||||
PROVIDE( _end = . );
|
||||
PROVIDE( end = . );
|
||||
|
||||
.stack ORIGIN(ram) + LENGTH(ram) - __stack_size :
|
||||
{
|
||||
PROVIDE( _heap_end = . );
|
||||
. = __stack_size;
|
||||
PROVIDE( _sp = . );
|
||||
} >ram AT>ram
|
||||
|
||||
}
|
||||
|
|
@ -1,22 +1,14 @@
|
|||
#include <stdint.h>
|
||||
|
||||
#include "../include/uart.h"
|
||||
#include "xprintf.h"
|
||||
|
||||
// UART0 regs
|
||||
#define UART0_BASE (0x30000000)
|
||||
#define UART0_CTRL (UART0_BASE + (0x00))
|
||||
#define UART0_STATUS (UART0_BASE + (0x04))
|
||||
#define UART0_BAUD (UART0_BASE + (0x08))
|
||||
#define UART0_TXDATA (UART0_BASE + (0x0c))
|
||||
|
||||
#define UART0_REG(addr) (*((volatile uint32_t *)addr))
|
||||
|
||||
|
||||
|
||||
static void uart_putc(uint8_t d)
|
||||
static void uart_putc(uint8_t c)
|
||||
{
|
||||
while (UART0_REG(UART0_STATUS) & 0x1);
|
||||
UART0_REG(UART0_TXDATA) = d;
|
||||
UART0_REG(UART0_TXDATA) = c;
|
||||
}
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -1,46 +0,0 @@
|
|||
.section .init;
|
||||
.globl _start;
|
||||
.type _start,@function
|
||||
|
||||
|
||||
_start:
|
||||
j _reset_handler
|
||||
|
||||
_reset_handler:
|
||||
.option push
|
||||
.option norelax
|
||||
la gp, __global_pointer$
|
||||
.option pop
|
||||
la sp, _sp
|
||||
li x26, 0x00
|
||||
li x27, 0x00
|
||||
|
||||
/* Load data section */
|
||||
la a0, _data_lma
|
||||
la a1, _data
|
||||
la a2, _edata
|
||||
bgeu a1, a2, 2f
|
||||
1:
|
||||
lw t0, (a0)
|
||||
sw t0, (a1)
|
||||
addi a0, a0, 4
|
||||
addi a1, a1, 4
|
||||
bltu a1, a2, 1b
|
||||
2:
|
||||
|
||||
/* Clear bss section */
|
||||
la a0, __bss_start
|
||||
la a1, _end
|
||||
bgeu a0, a1, 2f
|
||||
1:
|
||||
sw zero, (a0)
|
||||
addi a0, a0, 4
|
||||
bltu a0, a1, 1b
|
||||
2:
|
||||
|
||||
call main
|
||||
|
||||
li x26, 0x01
|
||||
|
||||
loop:
|
||||
j loop
|
||||
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Load Diff
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Reference in New Issue