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fpga: constrs: do not constraint JTAG_CLK clk 

Signed-off-by: liangkangnan <liangkangnan@163.com>
pull/1/head
liangkangnan 2020-07-25 16:20:54 +08:00
parent 6e4764f73d
commit 233bb1fb23
1 changed files with 1 additions and 1 deletions
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fpga/constrs/tinyriscv.xdc
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@ -46,7 +46,7 @@ set_property PACKAGE_PIN T15 [get_ports {gpio[1]}]
set_property IOSTANDARD LVCMOS33 [get_ports jtag_TCK]
set_property PACKAGE_PIN N11 [get_ports jtag_TCK]
create_clock -name jtag_clk_pin -period 300 [get_ports {jtag_TCK}];
#create_clock -name jtag_clk_pin -period 300 [get_ports {jtag_TCK}];
# JTAG TMS引脚
set_property IOSTANDARD LVCMOS33 [get_ports jtag_TMS]