tests: example: support sync interrupt handle
Signed-off-by: liangkangnan <liangkangnan@163.com>pull/1/head
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10a3df3e5a
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3cd30247d2
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@ -16,6 +16,7 @@ all: $(TARGET)
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ASM_SRCS += $(COMMON_DIR)/start.S
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ASM_SRCS += $(COMMON_DIR)/start.S
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ASM_SRCS += $(COMMON_DIR)/trap_entry.S
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ASM_SRCS += $(COMMON_DIR)/trap_entry.S
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C_SRCS += $(COMMON_DIR)/init.c
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C_SRCS += $(COMMON_DIR)/init.c
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C_SRCS += $(COMMON_DIR)/trap_handler.c
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C_SRCS += $(COMMON_DIR)/lib/utils.c
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C_SRCS += $(COMMON_DIR)/lib/utils.c
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C_SRCS += $(COMMON_DIR)/lib/xprintf.c
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C_SRCS += $(COMMON_DIR)/lib/xprintf.c
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C_SRCS += $(COMMON_DIR)/lib/uart.c
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C_SRCS += $(COMMON_DIR)/lib/uart.c
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@ -5,14 +5,6 @@
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extern void trap_entry();
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extern void trap_entry();
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extern void timer0_irq_handler() __attribute__((weak));
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void trap_handler(uint32_t mcause)
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{
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// we have only timer0 interrupt here
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timer0_irq_handler();
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}
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void _init()
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void _init()
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{
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{
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@ -45,8 +45,19 @@ trap_entry:
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STORE x31, 31*REGBYTES(sp)
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STORE x31, 31*REGBYTES(sp)
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csrr a0, mcause
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csrr a0, mcause
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call trap_handler
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csrr a1, mepc
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test_if_asynchronous:
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srli a2, a0, 31 /* MSB of mcause is 1 if handing an asynchronous interrupt - shift to LSB to clear other bits. */
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beq a2, x0, handle_synchronous /* Branch past interrupt handing if not asynchronous. */
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call trap_handler
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j asynchronous_return
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handle_synchronous:
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addi a1, a1, 4
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csrw mepc, a1
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asynchronous_return:
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LOAD x1, 1*REGBYTES(sp)
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LOAD x1, 1*REGBYTES(sp)
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LOAD x2, 2*REGBYTES(sp)
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LOAD x2, 2*REGBYTES(sp)
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LOAD x3, 3*REGBYTES(sp)
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LOAD x3, 3*REGBYTES(sp)
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@ -0,0 +1,11 @@
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#include <stdint.h>
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extern void timer0_irq_handler() __attribute__((weak));
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void trap_handler(uint32_t mcause, uint32_t mepc)
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{
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// we have only timer0 interrupt here
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timer0_irq_handler();
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}
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