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temp commit 

Signed-off-by: liangkangnan <liangkangnan@163.com>
pull/4/head
liangkangnan 2021-05-17 10:22:04 +08:00
parent b0f4592322
commit 536d28ede3
3 changed files with 4 additions and 4 deletions
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2
rtl/core/exception.sv
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@ -179,7 +179,7 @@ module exception (
wire[31:0] int_or_exception_cause;
wire[31:0] int_or_exception_offset;
assign int_or_exception_req = (interrupt_req & global_int_en) | exception_req;
assign int_or_exception_req = (interrupt_req & global_int_en & (~debug_mode_q)) | exception_req;
assign int_or_exception_cause = exception_req ? exception_cause : interrupt_cause;
assign int_or_exception_offset = exception_req ? exception_offset : interrupt_offset;

4
sdk/bsp/include/utils.h
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@ -1,8 +1,8 @@
#ifndef _UTILS_H_
#define _UTILS_H_
#define CPU_FREQ_HZ (50000000) // 50MHz
#define CPU_FREQ_MHZ (50) // 50MHz
#define CPU_FREQ_HZ (25000000) // 25MHz
#define CPU_FREQ_MHZ (25) // 25MHz
#define read_csr(reg) ({ unsigned long __tmp; \

2
sdk/examples/machine_timer/main.c
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@ -28,7 +28,7 @@ int main()
return 0;
#else
machine_timer_set_cmp_val(500000); // 10ms period
machine_timer_set_cmp_val(CPU_FREQ_MHZ * 10000); // 10ms period
machine_timer_clear_irq_pending();
global_irq_enable();
machine_timer_irq_enable(1);