use relative include path
Signed-off-by: liangkangnan <liangkangnan@163.com>pull/1/head
parent
02d19b9e6f
commit
d92352e1c2
|
@ -14,7 +14,7 @@
|
|||
limitations under the License.
|
||||
*/
|
||||
|
||||
`include "defines.v"
|
||||
`include "../core/defines.v"
|
||||
|
||||
// ram module
|
||||
module ram(
|
||||
|
|
|
@ -14,7 +14,7 @@
|
|||
limitations under the License.
|
||||
*/
|
||||
|
||||
`include "defines.v"
|
||||
`include "../core/defines.v"
|
||||
|
||||
|
||||
module rom(
|
||||
|
|
|
@ -14,7 +14,7 @@
|
|||
limitations under the License.
|
||||
*/
|
||||
|
||||
`include "defines.v"
|
||||
`include "../core/defines.v"
|
||||
|
||||
|
||||
// 32 bits count up timer module
|
||||
|
|
|
@ -14,7 +14,7 @@
|
|||
limitations under the License.
|
||||
*/
|
||||
|
||||
`include "defines.v"
|
||||
`include "../core/defines.v"
|
||||
|
||||
// tinyriscv soc顶层模块
|
||||
module tinyriscv_soc_top(
|
||||
|
@ -316,6 +316,7 @@ module tinyriscv_soc_top(
|
|||
|
||||
// jtag模块例化
|
||||
jtag_top u_jtag_top(
|
||||
.clk(clk),
|
||||
.jtag_rst_n(jtag_rst),
|
||||
.jtag_pin_TCK(jtag_TCK),
|
||||
.jtag_pin_TMS(jtag_TMS),
|
||||
|
|
Loading…
Reference in New Issue