rtl: gen_buf: add generate name

Signed-off-by: liangkangnan <liangkangnan@163.com>
pull/5/head
Blue Liang 2020-10-26 17:16:32 +08:00
parent 6fdf67143c
commit eebfefe33c
1 changed files with 3 additions and 3 deletions

View File

@ -32,10 +32,10 @@ module gen_ticks_sync #(
genvar i;
generate
for (i = 0; i < DP; i = i + 1) begin
if (i == 0) begin
for (i = 0; i < DP; i = i + 1) begin: dp_width
if (i == 0) begin: dp_is_0
gen_rst_0_dff #(DW) rst_0_dff(clk, rst, din, sync_dat[0]);
end else begin
end else begin: dp_is_not_0
gen_rst_0_dff #(DW) rst_0_dff(clk, rst, sync_dat[i-1], sync_dat[i]);
end
end