Commit Graph

34 Commits (22e6866deac71bf78b97969a1f82d418cc34f94f)

Author SHA1 Message Date
liangkangnan 3903d9e7f4 rtl:pinmux: add more spi mux
Signed-off-by: liangkangnan <liangkangnan@163.com>
2021-09-17 09:06:47 +08:00
liangkangnan 55f37e93fa rtl:perips:gpio: increase to 16 gpios
Signed-off-by: liangkangnan <liangkangnan@163.com>
2021-09-10 09:51:08 +08:00
liangkangnan 4086a2d863 rtl:perips: add pinmux
Signed-off-by: liangkangnan <liangkangnan@163.com>
2021-09-10 09:48:44 +08:00
liangkangnan 57690b00bd rtl:perips: add spi master
Signed-off-by: liangkangnan <liangkangnan@163.com>
2021-09-06 10:01:56 +08:00
liangkangnan ae3ff5a211 rtl🚌 use gnt and rvalid signal
Signed-off-by: liangkangnan <liangkangnan@163.com>
2021-09-01 09:54:32 +08:00
liangkangnan 2c11873056 rtl:i2c: fix slave read error
Signed-off-by: liangkangnan <liangkangnan@163.com>
2021-08-26 09:25:18 +08:00
liangkangnan e708eb6d4d rtl:perips:i2c: add i2c slave
Signed-off-by: liangkangnan <liangkangnan@163.com>
2021-08-25 17:51:35 +08:00
liangkangnan 7e57d8db17 rtl:perips:rvic: bug fix
Signed-off-by: liangkangnan <liangkangnan@163.com>
2021-08-25 17:47:18 +08:00
liangkangnan 2afcba47ea rtl:perips: add i2c master
Signed-off-by: liangkangnan <liangkangnan@163.com>
2021-08-19 09:43:12 +08:00
liangkangnan 6143d9ee6a rtl:gpio: remove gpio.h
Signed-off-by: liangkangnan <liangkangnan@163.com>
2021-08-17 10:20:30 +08:00
liangkangnan d4b670217a rtl:perips: rewrite rvic
Signed-off-by: liangkangnan <liangkangnan@163.com>
2021-08-14 14:03:47 +08:00
liangkangnan 5fa659a084 rtl:perips: rewrite gpio
Signed-off-by: liangkangnan <liangkangnan@163.com>
2021-08-13 09:33:15 +08:00
liangkangnan 64041b4d2b rtl: perips: rewrite timer module
Signed-off-by: liangkangnan <liangkangnan@163.com>
2021-08-10 09:47:37 +08:00
liangkangnan 58f180a92f rtl: perips: rewrite uart module
Signed-off-by: liangkangnan <liangkangnan@163.com>
2021-08-07 14:28:46 +08:00
liangkangnan 3227fb1ffd rtl:perips: add rvic
Signed-off-by: liangkangnan <liangkangnan@163.com>
2021-07-22 09:36:04 +08:00
liangkangnan fd2c981317 temp commit
Signed-off-by: liangkangnan <liangkangnan@163.com>
2021-07-09 15:18:09 +08:00
liangkangnan c847244c5b rtl: perips: fix machine timer
Signed-off-by: liangkangnan <liangkangnan@163.com>
2021-06-03 09:23:50 +08:00
liangkangnan 6e466fbbf7 add perips
Signed-off-by: liangkangnan <liangkangnan@163.com>
2021-05-14 21:00:57 +08:00
liangkangnan 16fa475ba7 rtl:perips: remove vld rdy signals
Signed-off-by: liangkangnan <liangkangnan@163.com>
2021-04-09 20:47:00 +08:00
Blue Liang 8214134b89 tmp commit, unstable
Signed-off-by: liangkangnan <liangkangnan@163.com>
2021-03-29 15:14:50 +08:00
liangkangnan 2b44f1e8f3 first release
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-10-23 21:26:18 +08:00
liangkangnan 0ed81ff1a8 rtl: remove unused signals
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-08-29 22:35:43 +08:00
liangkangnan b0c4d1fa4d rtl:timer: update interrupt assert
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-07-12 22:33:15 +08:00
liangkangnan 4c6c044afb rtl: add uart rx function
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-06-26 22:40:44 +08:00
liangkangnan 2619f26eae gpio: add input function
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-06-14 10:40:25 +08:00
liangkangnan 07b33baf94 perips: add spi master
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-05-05 18:31:08 +08:00
liangkangnan 043bc23f8a use = instead of <= in combination logic
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-05-02 11:57:25 +08:00
liangkangnan d92352e1c2 use relative include path
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-04-25 17:15:00 +08:00
liangkangnan 18577d9b61 use oneshot mode
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-04-18 11:37:22 +08:00
liangkangnan 0e188d4934 reorganize example and optimize interrupt
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-04-11 19:03:49 +08:00
liangkangnan b2827b2fb4 uart: update
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-04-06 19:54:40 +08:00
liangkangnan a68f31b604 perips: add uart_tx and gpio
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-04-05 22:27:00 +08:00
liangkangnan ecb9fca8c1 update
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-03-29 23:19:14 +08:00
liangkangnan c7c9193982 add peripheral: timer
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-03-08 15:07:17 +08:00