Commit Graph

272 Commits (6143d9ee6a7c0a391af08cb8c34e3f1fd0542166)

Author SHA1 Message Date
liangkangnan f10a4ac49b example: timer_int: init gpio mode
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-06-14 22:04:38 +08:00
liangkangnan 6b01facc48 example: gpio: add input usage
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-06-14 10:45:55 +08:00
liangkangnan 5c70814fc6 fpga: constrs: add one more gpio
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-06-14 10:41:52 +08:00
liangkangnan 2619f26eae gpio: add input function
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-06-14 10:40:25 +08:00
liangkangnan e28381dbcf add support for ebreak inst
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-06-13 14:56:44 +08:00
liangkangnan 5f64a5f8ae fpga: update README.md
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-06-07 21:55:28 +08:00
liangkangnan 764ecc7199 delete README.en.md
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-06-07 13:25:14 +08:00
liangkangnan 5b888bd483 rtl: core: fix data related for csr regs
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-06-05 22:22:49 +08:00
liangkangnan 0256674146 compliance test: add rv32Zicsr and rv32Zifencei build
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-06-05 22:19:49 +08:00
liangkangnan c3e607ec55 sim: compliance_test: fix can not find ref file
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-06-05 22:16:36 +08:00
liangkangnan 69484de8b2 openocd: tinyriscv.cfg: add halt cmd
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-05-31 21:05:18 +08:00
liangkangnan de9a978417 fix: must exit openocd after download temporary
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-05-31 14:41:39 +08:00
liangkangnan eec414aa96 use = instead of <=
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-05-31 14:38:57 +08:00
liangkangnan 1dea4a0a5e fpga: README: exit openocd after download
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-05-31 12:14:29 +08:00
liangkangnan 09d45f9ea9 rename FPGA to fpga
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-05-31 12:05:28 +08:00
liangkangnan dfbb1ed6c1 sim: compliance_test: add README.md
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-05-27 23:47:55 +08:00
liangkangnan 8cb261b079 sim: add README.md
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-05-27 23:43:35 +08:00
liangkangnan 0a7d7616ab add new inst test
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-05-27 23:24:33 +08:00
liangkangnan 38c2245218 sim: remove tb file to tb dir
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-05-27 23:17:05 +08:00
liangkangnan f775abf1d7 sim: add compliance test script
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-05-27 23:08:43 +08:00
liangkangnan 362d188458 use tb file in tb dir
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-05-27 23:07:14 +08:00
liangkangnan 897a346788 remove .elf
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-05-27 23:05:39 +08:00
liangkangnan 7d877c3348 tests: add riscv-compliance
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-05-27 23:04:07 +08:00
liangkangnan eb65d0badc FPGA: update simulation settings
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-05-24 13:37:45 +08:00
liangkangnan ea0734b280 FPGA: add vivado sim
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-05-21 22:04:23 +08:00
liangkangnan edee04cfe2 sim: fix vivado error
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-05-21 21:53:08 +08:00
liangkangnan 6c279fee39 update design doc
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-05-17 23:58:27 +08:00
liangkangnan ea6656db4d update design doc
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-05-17 13:47:49 +08:00
liangkangnan 4d6f7ad664 FPGA: add jtag download
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-05-13 21:48:44 +08:00
liangkangnan 834fcfb3ef debug: optimization for jtag
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-05-13 21:27:40 +08:00
liangkangnan 260246f488 fix nop inst
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-05-07 22:40:31 +08:00
liangkangnan 22ed29a149 add SPI pin
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-05-06 23:10:42 +08:00
liangkangnan ae67bfdebe add spi
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-05-05 19:50:27 +08:00
liangkangnan 038168c8f2 example: add spi_master
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-05-05 18:35:33 +08:00
liangkangnan 86392aa607 add n25q norflash driver
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-05-05 18:33:50 +08:00
liangkangnan 27da406793 add spi driver
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-05-05 18:32:46 +08:00
liangkangnan 07b33baf94 perips: add spi master
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-05-05 18:31:08 +08:00
liangkangnan 837af2c977 use = instead of <= in combination logic
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-05-02 11:58:44 +08:00
liangkangnan 043bc23f8a use = instead of <= in combination logic
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-05-02 11:57:25 +08:00
liangkangnan d7bdc35911 fix uninitial reg var
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-05-02 11:53:48 +08:00
liangkangnan 9edcc08634 add FPGA port
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-05-01 17:07:02 +08:00
liangkangnan 6a197d4a45 add weiyun download
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-04-29 21:47:39 +08:00
liangkangnan 4505067a95 add doc
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-04-29 21:16:36 +08:00
liangkangnan c38d288657 update
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-04-25 20:19:03 +08:00
liangkangnan ea21ca6a38 FPGA: add README.md
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-04-25 20:13:58 +08:00
liangkangnan c40dd0c603 update
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-04-25 17:34:58 +08:00
liangkangnan 39750cffc8 add freertos
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-04-25 17:24:51 +08:00
liangkangnan aead35700c add signal
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-04-25 17:15:46 +08:00
liangkangnan d92352e1c2 use relative include path
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-04-25 17:15:00 +08:00
liangkangnan 02d19b9e6f add mie and mstatus reg
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-04-25 17:13:12 +08:00