liangkangnan
|
b57bfe7736
|
rtl: timing optimization
Signed-off-by: liangkangnan <liangkangnan@163.com>
|
2020-09-09 21:00:14 +08:00 |
|
liangkangnan
|
a73b0ea36b
|
rtl: add uart_debug module
Signed-off-by: liangkangnan <liangkangnan@163.com>
|
2020-07-04 14:32:31 +08:00 |
|
liangkangnan
|
de9a978417
|
fix: must exit openocd after download temporary
Signed-off-by: liangkangnan <liangkangnan@163.com>
|
2020-05-31 14:41:39 +08:00 |
|
liangkangnan
|
834fcfb3ef
|
debug: optimization for jtag
Signed-off-by: liangkangnan <liangkangnan@163.com>
|
2020-05-13 21:27:40 +08:00 |
|
liangkangnan
|
d7bdc35911
|
fix uninitial reg var
Signed-off-by: liangkangnan <liangkangnan@163.com>
|
2020-05-02 11:53:48 +08:00 |
|
liangkangnan
|
02bcee9aa9
|
sync for different clock
Signed-off-by: liangkangnan <liangkangnan@163.com>
|
2020-04-25 17:10:11 +08:00 |
|
liangkangnan
|
e714a0ba63
|
add write dpc
Signed-off-by: liangkangnan <liangkangnan@163.com>
|
2020-04-06 14:34:12 +08:00 |
|
liangkangnan
|
ecb9fca8c1
|
update
Signed-off-by: liangkangnan <liangkangnan@163.com>
|
2020-03-29 23:19:14 +08:00 |
|
liangkangnan
|
8208cbc100
|
support JTAG
Signed-off-by: liangkangnan <liangkangnan@163.com>
|
2020-03-01 14:55:36 +08:00 |