Commit Graph

25 Commits (f6c8a046c72c6fdc118d9a714ddbc1a81d4911a0)

Author SHA1 Message Date
liangkangnan 6d8015727e temp commit
Signed-off-by: liangkangnan <liangkangnan@163.com>
2021-05-31 10:27:01 +08:00
liangkangnan 247a5b6354 temp commit
Signed-off-by: liangkangnan <liangkangnan@163.com>
2021-05-28 15:10:37 +08:00
liangkangnan cd9ac0adae debug: change dmi addr bits to 7
Signed-off-by: liangkangnan <liangkangnan@163.com>
2021-05-28 10:37:50 +08:00
liangkangnan 5811bdde13 debug: add hw breakpoint support
Signed-off-by: liangkangnan <liangkangnan@163.com>
2021-05-14 14:37:47 +08:00
liangkangnan 36147d9391 temp commit
Signed-off-by: liangkangnan <liangkangnan@163.com>
2021-05-11 10:35:36 +08:00
liangkangnan 4a4c08bc69 temp commit
Signed-off-by: liangkangnan <liangkangnan@163.com>
2021-05-04 21:11:43 +08:00
liangkangnan f9412fca3c temp commit
Signed-off-by: liangkangnan <liangkangnan@163.com>
2021-04-29 19:27:25 +08:00
liangkangnan 77812d60df temp commit
Signed-off-by: liangkangnan <liangkangnan@163.com>
2021-04-26 14:08:26 +08:00
liangkangnan 4da79b6046 debug: add sba module
Signed-off-by: liangkangnan <liangkangnan@163.com>
2021-04-26 09:48:19 +08:00
liangkangnan ec65381ba9 temp commit
Signed-off-by: liangkangnan <liangkangnan@163.com>
2021-04-25 17:14:09 +08:00
Blue Liang 8214134b89 tmp commit, unstable
Signed-off-by: liangkangnan <liangkangnan@163.com>
2021-03-29 15:14:50 +08:00
liangkangnan fdc776ab5e rtl: debug: support reset cmd
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-12-06 20:06:12 +08:00
liangkangnan 2b44f1e8f3 first release
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-10-23 21:26:18 +08:00
liangkangnan 386ba909ba rtl: jtag: handle DM module in cpu clock domain
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-09-23 21:37:00 +08:00
liangkangnan 633a1d0b15 rtl: debug: fix latch
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-09-20 22:18:58 +08:00
liangkangnan 045f482fe1 rtl: jtag: optimization
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-09-13 17:47:18 +08:00
liangkangnan b57bfe7736 rtl: timing optimization
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-09-09 21:00:14 +08:00
liangkangnan a73b0ea36b rtl: add uart_debug module
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-07-04 14:32:31 +08:00
liangkangnan de9a978417 fix: must exit openocd after download temporary
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-05-31 14:41:39 +08:00
liangkangnan 834fcfb3ef debug: optimization for jtag
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-05-13 21:27:40 +08:00
liangkangnan d7bdc35911 fix uninitial reg var
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-05-02 11:53:48 +08:00
liangkangnan 02bcee9aa9 sync for different clock
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-04-25 17:10:11 +08:00
liangkangnan e714a0ba63 add write dpc
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-04-06 14:34:12 +08:00
liangkangnan ecb9fca8c1 update
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-03-29 23:19:14 +08:00
liangkangnan 8208cbc100 support JTAG
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-03-01 14:55:36 +08:00