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153 Commits
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153 Commits (fccb92007026d505e5cf9ebe9dd4db135217ed33)

Author SHA1 Message Date
liangkangnan f775abf1d7 sim: add compliance test script 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-05-27 23:08:43 +08:00
liangkangnan 362d188458 use tb file in tb dir 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-05-27 23:07:14 +08:00
liangkangnan 897a346788 remove .elf 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-05-27 23:05:39 +08:00
liangkangnan 7d877c3348 tests: add riscv-compliance 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-05-27 23:04:07 +08:00
liangkangnan eb65d0badc FPGA: update simulation settings 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-05-24 13:37:45 +08:00
liangkangnan ea0734b280 FPGA: add vivado sim 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-05-21 22:04:23 +08:00
liangkangnan edee04cfe2 sim: fix vivado error 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-05-21 21:53:08 +08:00
liangkangnan 6c279fee39 update design doc 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-05-17 23:58:27 +08:00
liangkangnan ea6656db4d update design doc 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-05-17 13:47:49 +08:00
liangkangnan 4d6f7ad664 FPGA: add jtag download 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-05-13 21:48:44 +08:00
liangkangnan 834fcfb3ef debug: optimization for jtag 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-05-13 21:27:40 +08:00
liangkangnan 260246f488 fix nop inst 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-05-07 22:40:31 +08:00
liangkangnan 22ed29a149 add SPI pin 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-05-06 23:10:42 +08:00
liangkangnan ae67bfdebe add spi 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-05-05 19:50:27 +08:00
liangkangnan 038168c8f2 example: add spi_master 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-05-05 18:35:33 +08:00
liangkangnan 86392aa607 add n25q norflash driver 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-05-05 18:33:50 +08:00
liangkangnan 27da406793 add spi driver 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-05-05 18:32:46 +08:00
liangkangnan 07b33baf94 perips: add spi master 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-05-05 18:31:08 +08:00
liangkangnan 837af2c977 use = instead of <= in combination logic 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-05-02 11:58:44 +08:00
liangkangnan 043bc23f8a use = instead of <= in combination logic 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-05-02 11:57:25 +08:00
liangkangnan d7bdc35911 fix uninitial reg var 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-05-02 11:53:48 +08:00
liangkangnan 9edcc08634 add FPGA port 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-05-01 17:07:02 +08:00
liangkangnan 6a197d4a45 add weiyun download 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-29 21:47:39 +08:00
liangkangnan 4505067a95 add doc 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-29 21:16:36 +08:00
liangkangnan c38d288657 update 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-25 20:19:03 +08:00
liangkangnan ea21ca6a38 FPGA: add README.md 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-25 20:13:58 +08:00
liangkangnan c40dd0c603 update 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-25 17:34:58 +08:00
liangkangnan 39750cffc8 add freertos 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-25 17:24:51 +08:00
liangkangnan aead35700c add signal 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-25 17:15:46 +08:00
liangkangnan d92352e1c2 use relative include path 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-25 17:15:00 +08:00
liangkangnan 02d19b9e6f add mie and mstatus reg 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-25 17:13:12 +08:00
liangkangnan 4a530ab894 add ECALL inst 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-25 17:11:53 +08:00
liangkangnan 02bcee9aa9 sync for different clock 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-25 17:10:11 +08:00
liangkangnan 43aca8195c add clint hold input signal 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-25 17:08:46 +08:00
liangkangnan db8a65ebf4 use larger rom and ram for more example 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-25 17:07:31 +08:00
liangkangnan f110a2c0e0 set MPIE and MPP 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-25 17:05:48 +08:00
liangkangnan 6cf86e0286 stop div when interrupt assert 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-25 17:04:44 +08:00
liangkangnan 09513f8f2c support preemption 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-25 17:03:13 +08:00
liangkangnan 0ac39d9cdd add FPGA xdc file 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-25 16:59:23 +08:00
liangkangnan 7434cad275 example: add FreeRTOS 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-25 16:57:57 +08:00
liangkangnan 39af40a476 add FPGA clock 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-19 11:05:08 +08:00
liangkangnan 69321f870e add other 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-19 10:55:53 +08:00
liangkangnan f1f89f7bf5 add toolchain and mcmodel configuration 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-18 21:27:26 +08:00
liangkangnan ea9b4de53d update 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-18 20:53:34 +08:00
liangkangnan 7708930ecf update 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-18 20:49:42 +08:00
liangkangnan 57ca3832a0 add C example instruction 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-18 20:42:20 +08:00
liangkangnan dcac95dfab add code comments 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-18 20:14:37 +08:00
liangkangnan 73098bdcd8 optimized 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-18 11:39:27 +08:00
liangkangnan 18577d9b61 use oneshot mode 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-18 11:37:22 +08:00
liangkangnan ce225394df fix reg1 reg2 bits width 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-18 11:35:43 +08:00