tinyriscv/rtl/core
liangkangnan a68f31b604 perips: add uart_tx and gpio
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-04-05 22:27:00 +08:00
..
clint.v update 2020-03-29 23:19:14 +08:00
csr_reg.v support CSR inst 2020-04-05 22:22:34 +08:00
ctrl.v update 2020-03-29 23:19:14 +08:00
defines.v support CSR inst 2020-04-05 22:22:34 +08:00
div.v update 2020-03-29 23:19:14 +08:00
ex.v support CSR inst 2020-04-05 22:22:34 +08:00
id.v support CSR inst 2020-04-05 22:22:34 +08:00
id_ex.v support CSR inst 2020-04-05 22:22:34 +08:00
if_id.v update 2020-03-29 23:19:14 +08:00
pc_reg.v update 2020-03-29 23:19:14 +08:00
ram.v update 2020-03-29 23:19:14 +08:00
regs.v update 2020-03-29 23:19:14 +08:00
rib.v perips: add uart_tx and gpio 2020-04-05 22:27:00 +08:00
rom.v update 2020-03-29 23:19:14 +08:00
tinyriscv.v support CSR inst 2020-04-05 22:22:34 +08:00