90 lines
3.0 KiB
Plaintext
90 lines
3.0 KiB
Plaintext
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# 时钟引脚
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set_property IOSTANDARD LVCMOS33 [get_ports clk_50m_i]
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set_property PACKAGE_PIN N14 [get_ports clk_50m_i]
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# 时钟约束50MHz
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create_clock -add -name SYS_CLK -period 20.00 [get_ports clk_50m_i]
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# 复位引脚
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set_property IOSTANDARD LVCMOS33 [get_ports rst_ext_ni]
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set_property PACKAGE_PIN L13 [get_ports rst_ext_ni]
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# CPU停住指示引脚
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set_property IOSTANDARD LVCMOS33 [get_ports halted_ind_pin]
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set_property PACKAGE_PIN P15 [get_ports halted_ind_pin]
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# 串口发送引脚
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set_property IOSTANDARD LVCMOS33 [get_ports uart_tx_pin]
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set_property PACKAGE_PIN M6 [get_ports uart_tx_pin]
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# 串口接收引脚
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set_property IOSTANDARD LVCMOS33 [get_ports uart_rx_pin]
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set_property PACKAGE_PIN N6 [get_ports uart_rx_pin]
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# I2C0 SCL引脚
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set_property IOSTANDARD LVCMOS33 [get_ports i2c_scl_pin]
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set_property PACKAGE_PIN R10 [get_ports i2c_scl_pin]
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# I2C0 SDA引脚
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set_property IOSTANDARD LVCMOS33 [get_ports i2c_sda_pin]
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set_property PACKAGE_PIN R11 [get_ports i2c_sda_pin]
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# SPI DQ3引脚
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set_property IOSTANDARD LVCMOS33 [get_ports spi_dq3_pin]
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set_property PACKAGE_PIN P3 [get_ports spi_dq3_pin]
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# SPI DQ2引脚
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set_property IOSTANDARD LVCMOS33 [get_ports spi_dq2_pin]
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set_property PACKAGE_PIN P4 [get_ports spi_dq2_pin]
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# SPI DQ1引脚
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set_property IOSTANDARD LVCMOS33 [get_ports spi_dq1_pin]
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set_property PACKAGE_PIN P1 [get_ports spi_dq1_pin]
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# SPI DQ0引脚
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set_property IOSTANDARD LVCMOS33 [get_ports spi_dq0_pin]
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set_property PACKAGE_PIN N1 [get_ports spi_dq0_pin]
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# SPI SS引脚
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set_property IOSTANDARD LVCMOS33 [get_ports spi_ss_pin]
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set_property PACKAGE_PIN M5 [get_ports spi_ss_pin]
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# SPI CLK引脚
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set_property IOSTANDARD LVCMOS33 [get_ports spi_clk_pin]
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set_property PACKAGE_PIN N4 [get_ports spi_clk_pin]
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# GPIO0引脚
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set_property IOSTANDARD LVCMOS33 [get_ports {gpio_pins[0]}]
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set_property PACKAGE_PIN P16 [get_ports {gpio_pins[0]}]
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# GPIO1引脚
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set_property IOSTANDARD LVCMOS33 [get_ports {gpio_pins[1]}]
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set_property PACKAGE_PIN T15 [get_ports {gpio_pins[1]}]
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# JTAG TCK引脚
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set_property IOSTANDARD LVCMOS33 [get_ports jtag_TCK_pin]
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set_property PACKAGE_PIN N11 [get_ports jtag_TCK_pin]
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# 1MHZ
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#create_clock -name JTAG_CLK -period 1000 [get_ports jtag_TCK_pin]
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# JTAG TMS引脚
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set_property IOSTANDARD LVCMOS33 [get_ports jtag_TMS_pin]
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set_property PACKAGE_PIN N3 [get_ports jtag_TMS_pin]
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#set_input_delay -clock JTAG_CLK 500 [get_ports jtag_TMS_pin]
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# JTAG TDI引脚
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set_property IOSTANDARD LVCMOS33 [get_ports jtag_TDI_pin]
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set_property PACKAGE_PIN N2 [get_ports jtag_TDI_pin]
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#set_input_delay -clock JTAG_CLK 500 [get_ports jtag_TDI_pin]
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# JTAG TDO引脚
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set_property IOSTANDARD LVCMOS33 [get_ports jtag_TDO_pin]
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set_property PACKAGE_PIN M1 [get_ports jtag_TDO_pin]
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#set_output_delay -clock JTAG_CLK 500 [get_ports jtag_TDO_pin]
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set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design]
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set_property CONFIG_MODE SPIx4 [current_design]
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set_property BITSTREAM.CONFIG.CONFIGRATE 50 [current_design]
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