tinyriscv/rtl/perips/spi/spi_reg_pkg.sv

// Copyright lowRISC contributors.
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0
//
// Register Package auto-generated by `reggen` containing data structure

package spi_reg_pkg;

  // Address widths within the block
  parameter int BlockAw = 4;

  ////////////////////////////
  // Typedefs for registers //
  ////////////////////////////

  typedef struct packed {
    struct packed {
      logic        q;
      logic        qe;
    } enable;
    struct packed {
      logic        q;
      logic        qe;
    } int_en;
    struct packed {
      logic        q;
      logic        qe;
    } int_pending;
    struct packed {
      logic        q;
      logic        qe;
    } role_mode;
    struct packed {
      logic [1:0]  q;
      logic        qe;
    } cp_mode;
    struct packed {
      logic [1:0]  q;
      logic        qe;
    } spi_mode;
    struct packed {
      logic        q;
      logic        qe;
    } read;
    struct packed {
      logic        q;
      logic        qe;
    } msb_first;
    struct packed {
      logic        q;
      logic        qe;
    } ss_sw_ctrl;
    struct packed {
      logic        q;
      logic        qe;
    } ss_level;
    struct packed {
      logic [3:0]  q;
      logic        qe;
    } ss_delay;
    struct packed {
      logic [2:0]  q;
      logic        qe;
    } clk_div;
  } spi_reg2hw_ctrl0_reg_t;

  typedef struct packed {
    struct packed {
      logic        q;
    } tx_fifo_full;
    struct packed {
      logic        q;
    } tx_fifo_empty;
    struct packed {
      logic        q;
    } rx_fifo_full;
    struct packed {
      logic        q;
    } rx_fifo_empty;
    struct packed {
      logic        q;
    } busy;
  } spi_reg2hw_status_reg_t;

  typedef struct packed {
    logic [7:0]  q;
    logic        qe;
  } spi_reg2hw_txdata_reg_t;

  typedef struct packed {
    logic [7:0]  q;
    logic        re;
  } spi_reg2hw_rxdata_reg_t;

  typedef struct packed {
    struct packed {
      logic        d;
      logic        de;
    } enable;
    struct packed {
      logic        d;
      logic        de;
    } int_en;
    struct packed {
      logic        d;
      logic        de;
    } int_pending;
    struct packed {
      logic        d;
      logic        de;
    } role_mode;
    struct packed {
      logic [1:0]  d;
      logic        de;
    } cp_mode;
    struct packed {
      logic [1:0]  d;
      logic        de;
    } spi_mode;
    struct packed {
      logic        d;
      logic        de;
    } read;
    struct packed {
      logic        d;
      logic        de;
    } msb_first;
    struct packed {
      logic        d;
      logic        de;
    } ss_sw_ctrl;
    struct packed {
      logic        d;
      logic        de;
    } ss_level;
    struct packed {
      logic [3:0]  d;
      logic        de;
    } ss_delay;
    struct packed {
      logic [2:0]  d;
      logic        de;
    } clk_div;
  } spi_hw2reg_ctrl0_reg_t;

  typedef struct packed {
    struct packed {
      logic        d;
    } tx_fifo_full;
    struct packed {
      logic        d;
    } tx_fifo_empty;
    struct packed {
      logic        d;
    } rx_fifo_full;
    struct packed {
      logic        d;
    } rx_fifo_empty;
    struct packed {
      logic        d;
    } busy;
  } spi_hw2reg_status_reg_t;

  typedef struct packed {
    logic [7:0]  d;
  } spi_hw2reg_rxdata_reg_t;

  // Register -> HW type
  typedef struct packed {
    spi_reg2hw_ctrl0_reg_t ctrl0; // [53:23]
    spi_reg2hw_status_reg_t status; // [22:18]
    spi_reg2hw_txdata_reg_t txdata; // [17:9]
    spi_reg2hw_rxdata_reg_t rxdata; // [8:0]
  } spi_reg2hw_t;

  // HW -> register type
  typedef struct packed {
    spi_hw2reg_ctrl0_reg_t ctrl0; // [43:13]
    spi_hw2reg_status_reg_t status; // [12:8]
    spi_hw2reg_rxdata_reg_t rxdata; // [7:0]
  } spi_hw2reg_t;

  // Register offsets
  parameter logic [BlockAw-1:0] SPI_CTRL0_OFFSET = 4'h0;
  parameter logic [BlockAw-1:0] SPI_STATUS_OFFSET = 4'h4;
  parameter logic [BlockAw-1:0] SPI_TXDATA_OFFSET = 4'h8;
  parameter logic [BlockAw-1:0] SPI_RXDATA_OFFSET = 4'hc;

  // Reset values for hwext registers and their fields
  parameter logic [4:0] SPI_STATUS_RESVAL = 5'h0;
  parameter logic [7:0] SPI_RXDATA_RESVAL = 8'h0;

  // Register index
  typedef enum int {
    SPI_CTRL0,
    SPI_STATUS,
    SPI_TXDATA,
    SPI_RXDATA
  } spi_id_e;

  // Register width information to check illegal writes
  parameter logic [3:0] SPI_PERMIT [4] = '{
    4'b1111, // index[0] SPI_CTRL0
    4'b0001, // index[1] SPI_STATUS
    4'b0001, // index[2] SPI_TXDATA
    4'b0001  // index[3] SPI_RXDATA
  };

endpackage