tinyriscv/tests/riscv-compliance/build_generated/rv32i/I-DELAY_SLOTS-01.elf.objdump

210 lines
7.2 KiB
Plaintext

/home/ubuntu/tinyriscv/tests/riscv-compliance/build_generated/rv32i/I-DELAY_SLOTS-01.elf: file format elf32-littleriscv
Disassembly of section .text.init:
00000000 <_start>:
0: 0480006f j 48 <reset_vector>
00000004 <trap_vector>:
4: 34202f73 csrr t5,mcause
8: 00800f93 li t6,8
c: 03ff0863 beq t5,t6,3c <write_tohost>
10: 00900f93 li t6,9
14: 03ff0463 beq t5,t6,3c <write_tohost>
18: 00b00f93 li t6,11
1c: 03ff0063 beq t5,t6,3c <write_tohost>
20: 00000f13 li t5,0
24: 000f0463 beqz t5,2c <trap_vector+0x28>
28: 000f0067 jr t5
2c: 34202f73 csrr t5,mcause
30: 000f5463 bgez t5,38 <handle_exception>
34: 0040006f j 38 <handle_exception>
00000038 <handle_exception>:
38: 5391e193 ori gp,gp,1337
0000003c <write_tohost>:
3c: 00001f17 auipc t5,0x1
40: fc3f2223 sw gp,-60(t5) # 1000 <tohost>
44: ff9ff06f j 3c <write_tohost>
00000048 <reset_vector>:
48: 00000193 li gp,0
4c: 00000297 auipc t0,0x0
50: fb828293 addi t0,t0,-72 # 4 <trap_vector>
54: 30529073 csrw mtvec,t0
58: 30005073 csrwi mstatus,0
5c: 00000297 auipc t0,0x0
60: 02028293 addi t0,t0,32 # 7c <begin_testcode>
64: 34129073 csrw mepc,t0
68: 00000293 li t0,0
6c: 20000337 lui t1,0x20000
70: 01030313 addi t1,t1,16 # 20000010 <_end+0x1fffde0c>
74: 00532023 sw t0,0(t1)
78: 30200073 mret
0000007c <begin_testcode>:
7c: 00002097 auipc ra,0x2
80: f8408093 addi ra,ra,-124 # 2000 <begin_signature>
84: 11111137 lui sp,0x11111
88: 11110113 addi sp,sp,273 # 11111111 <_end+0x1110ef0d>
8c: 0080006f j 94 <begin_testcode+0x18>
90: 00000113 li sp,0
94: 0020a023 sw sp,0(ra)
98: 00002097 auipc ra,0x2
9c: f6c08093 addi ra,ra,-148 # 2004 <test_A2_res>
a0: 22222137 lui sp,0x22222
a4: 22210113 addi sp,sp,546 # 22222222 <_end+0x2222001e>
a8: 00000217 auipc tp,0x0
ac: 01020213 addi tp,tp,16 # b8 <begin_testcode+0x3c>
b0: 00020067 jr tp # 0 <_start>
b4: 00000113 li sp,0
b8: 0020a023 sw sp,0(ra)
bc: 00002097 auipc ra,0x2
c0: f4c08093 addi ra,ra,-180 # 2008 <test_B1_res>
c4: 00500293 li t0,5
c8: 00600313 li t1,6
cc: 33333137 lui sp,0x33333
d0: 33310113 addi sp,sp,819 # 33333333 <_end+0x3333112f>
d4: 00528463 beq t0,t0,dc <begin_testcode+0x60>
d8: 00000113 li sp,0
dc: 0020a023 sw sp,0(ra)
e0: 00002097 auipc ra,0x2
e4: f2c08093 addi ra,ra,-212 # 200c <test_B2_res>
e8: 00500293 li t0,5
ec: 00600313 li t1,6
f0: 44444137 lui sp,0x44444
f4: 44410113 addi sp,sp,1092 # 44444444 <_end+0x44442240>
f8: 00629463 bne t0,t1,100 <begin_testcode+0x84>
fc: 00000113 li sp,0
100: 0020a023 sw sp,0(ra)
104: 00002097 auipc ra,0x2
108: f0c08093 addi ra,ra,-244 # 2010 <test_B3_res>
10c: 00500293 li t0,5
110: 00600313 li t1,6
114: 55555137 lui sp,0x55555
118: 55510113 addi sp,sp,1365 # 55555555 <_end+0x55553351>
11c: 0062c463 blt t0,t1,124 <begin_testcode+0xa8>
120: 00000113 li sp,0
124: 0020a023 sw sp,0(ra)
128: 00002097 auipc ra,0x2
12c: eec08093 addi ra,ra,-276 # 2014 <test_B4_res>
130: 00500293 li t0,5
134: 00600313 li t1,6
138: 66666137 lui sp,0x66666
13c: 66610113 addi sp,sp,1638 # 66666666 <_end+0x66664462>
140: 0062e463 bltu t0,t1,148 <begin_testcode+0xcc>
144: 00000113 li sp,0
148: 0020a023 sw sp,0(ra)
14c: 00002097 auipc ra,0x2
150: ecc08093 addi ra,ra,-308 # 2018 <test_B5_res>
154: 00500293 li t0,5
158: 00600313 li t1,6
15c: 77777137 lui sp,0x77777
160: 77710113 addi sp,sp,1911 # 77777777 <_end+0x77775573>
164: 00535463 bge t1,t0,16c <begin_testcode+0xf0>
168: 00000113 li sp,0
16c: 0020a023 sw sp,0(ra)
170: 00002097 auipc ra,0x2
174: eac08093 addi ra,ra,-340 # 201c <test_B6_res>
178: 00500293 li t0,5
17c: 00600313 li t1,6
180: 88889137 lui sp,0x88889
184: 88810113 addi sp,sp,-1912 # 88888888 <_end+0x88886684>
188: 00537463 bgeu t1,t0,190 <begin_testcode+0x114>
18c: 00000113 li sp,0
190: 0020a023 sw sp,0(ra)
194: 00002297 auipc t0,0x2
198: e6c28293 addi t0,t0,-404 # 2000 <begin_signature>
19c: 20000337 lui t1,0x20000
1a0: 00830313 addi t1,t1,8 # 20000008 <_end+0x1fffde04>
1a4: 00532023 sw t0,0(t1)
1a8: 00002297 auipc t0,0x2
1ac: e7828293 addi t0,t0,-392 # 2020 <end_signature>
1b0: 20000337 lui t1,0x20000
1b4: 00c30313 addi t1,t1,12 # 2000000c <_end+0x1fffde08>
1b8: 00532023 sw t0,0(t1)
1bc: 00100293 li t0,1
1c0: 20000337 lui t1,0x20000
1c4: 01030313 addi t1,t1,16 # 20000010 <_end+0x1fffde0c>
1c8: 00532023 sw t0,0(t1)
1cc: 00000013 nop
1d0: 00100193 li gp,1
1d4: 00000073 ecall
000001d8 <end_testcode>:
1d8: c0001073 unimp
...
Disassembly of section .tohost:
00001000 <tohost>:
...
00001100 <fromhost>:
...
Disassembly of section .data:
00002000 <begin_signature>:
2000: ffff 0xffff
2002: ffff 0xffff
00002004 <test_A2_res>:
2004: ffff 0xffff
2006: ffff 0xffff
00002008 <test_B1_res>:
2008: ffff 0xffff
200a: ffff 0xffff
0000200c <test_B2_res>:
200c: ffff 0xffff
200e: ffff 0xffff
00002010 <test_B3_res>:
2010: ffff 0xffff
2012: ffff 0xffff
00002014 <test_B4_res>:
2014: ffff 0xffff
2016: ffff 0xffff
00002018 <test_B5_res>:
2018: ffff 0xffff
201a: ffff 0xffff
0000201c <test_B6_res>:
201c: ffff 0xffff
201e: ffff 0xffff
00002020 <end_signature>:
...
00002100 <begin_regstate>:
2100: 0080 addi s0,sp,64
...
00002200 <end_regstate>:
2200: 0004 0x4
...
Disassembly of section .riscv.attributes:
00000000 <.riscv.attributes>:
0: 1d41 addi s10,s10,-16
2: 0000 unimp
4: 7200 flw fs0,32(a2)
6: 7369 lui t1,0xffffa
8: 01007663 bgeu zero,a6,14 <trap_vector+0x10>
c: 00000013 nop
10: 7205 lui tp,0xfffe1
12: 3376 fld ft6,376(sp)
14: 6932 flw fs2,12(sp)
16: 7032 flw ft0,44(sp)
18: 0030 addi a2,sp,8
1a: 0108 addi a0,sp,128
1c: 0b0a slli s6,s6,0x2